A Computation-In-Memory Accelerator Based on Resistive Devices

Conference Paper (2019)
Author(s)

Hoang Anh Du Nguyen (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Jintao Yu (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Muath Abu Lebdeh (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Mottaqiallah Taouil (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Said Hamdioui (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1145/3357526.3357554 Final published version
More Info
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Publication Year
2019
Language
English
Research Group
Computer Engineering
Pages (from-to)
19-32
ISBN (print)
978-1-4503-7206-0
Event
MEMSYS 2019 (2019-09-30 - 2019-10-03), Wahington, United States
Downloads counter
225

Abstract

Today's computing architectures suffer from the three well-known bottlenecks, which are the memory, the power and the instruction-level parallelism walls. Emerging non-volatile technologies, such as memristor, enable new resistive architectures that alleviate at least two of such bottlenecks, as they can process data within the memory with almost no leakage. In this paper, we propose a novel resistive computing architecture by extending a conventional architecture with a resistive based Computation-In-Memory accelerator (CIMX). We evaluate the delay, energy and area of the conventional and CIMX architecture using an analytical model and a simulation framework. The results (both based on the analytical model and simulation framework) show that the proposed architecture achieves at least one order of magnitude improvement in terms of performance, area, and energy efficiency for the considered benchmarks.