Single-Channel Heterogeneous-Source Energy Harvesting PMIC Design

Master thesis (2021)

Authors

J.P. van der Velden Electrical Engineering, Mathematics and Computer Science

Contributors

W.A. Serdijn Bio-Electronics - EEMCS (supervisor 1)
G. Campos Martins Bio-Electronics - EEMCS (supervisor 1)
S. Du Electronic Instrumentation - EEMCS (supervisor 2)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright: © 2021 Joram van der Velden
CMOS Energy harvesting Heterogeneous sources Single-channel Single-input DC-DC converter Switched-capacitor (SC) Charge pump Piezoelectric energy harvester (PEH) Maximum output power improvement rate (MOPIR) Flipping-capacitor rectifier (FCR) Synchronized switch harvesting on capacitors (SSHC) Capacitor re-use Source differentiation
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Published Date

24-08-2021

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

This work proposes an energy harvesting platform that is
able to convert power from both DC sources (photo-voltaic cells and TEGs) as
well as piezo element sources. It does so only using a single input channel to
which a single harvester can be connected. The proposed system is able to
differentiate between the two source types and adjust the power converter
configuration accordingly.For the DC sources, a novel switched-capacitor power
converter (SCPC) is proposed, that is able to convert the energy from a
harvester that has a maximum power point (MPP) output voltage of 170mV to 5V
and a maximum power point output power of 10uW to 50mW. This DC-DC converter
offers 119 different positive voltage conversion ratios, with a maximum voltage
conversion ratio of 16, using four in-package capacitors. As a result of this
high number of conversion ratios, the MPP output voltage of the harvester and
the input voltage of the power converter are matched accurately, causing the
harvesting efficiency to be very high. A maximum harvesting efficiency of 96.2%
is found in simulations. For the piezo element sources, the concept of a
flipping-capacitor rectifier (FCR) has been adjusted to work in harmony with
the designed SCPC. In a steady-state condition, the capacitors of the SCPC
reach specific voltages, such that they can create evenly spaced voltage steps
for the flipping operation. With this technique, a voltage flipping efficiency
of 0.9375 and a theoretical maximum output power improvement rate (MOPIR) of 32
can be reached. Due to losses in the system, simulation results show a MOPIR of
up to 20.0, which is still significantly higher than the state-of-art. The
system is designed to work with harvesters with a piezo capacitance of up to
100nF, an excitation frequency of 1Hz to 200Hz and an equivalent FBR maximum
power point output power of 1uW to 50mW. An implementation of the proposed
system is discussed and simulated. The total active silicon area for the
designed system is 2.12mm2 in a 0.18 um TSMC technology.