Device-Aware Test: A Means to Attack Unmodelled Defects (Invited)

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Device-Aware Test: A Means to Attack Unmodelled Defects (Invited)

Conference Paper (2025)

Author(s)

S. Hamdioui (TU Delft - Computer Engineering)

Mottaqiallah Taouil (TU Delft - Computer Engineering)

Research Group

Computer Engineering

DOI related publication

https://doi.org/10.1109/DAC63849.2025.11132993

Fault modeling Test generation Defect modeling Device-Aware test

To reference this document use:

https://resolver.tudelft.nl/uuid:5f5ae9c7-30cc-4c44-bf0b-0001588750c9

More Info

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Publication Year

2025

Language

English

Research Group

Computer Engineering

Bibliographical Note

Green Open Access added to TU Delft Institutional Repository as part of the Taverne amendment. More information about this copyright law amendment can be found at https://www.openaccess.nl. Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.@en

ISBN (print)

979-8-3315-0305-5

ISBN (electronic)

979-8-3315-0304-8

Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Abstract

Structural testing has been very successful in the VLSI manufacturing process to screen out faulty devices and provide high outgoing product quality. However, recent reported data show that existing solutions are not good enough for advanced technology nodes and emerging device technologies. This paper discusses a new manufacturing test approach called DeviceAware Test (DAT), applies it to different flavors of emerging devices, and its potential to be used beyond just manufacturing test.

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