Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

Conference Paper (2019)
Author(s)

Sadik Ilik (Istanbul Technical University)

Nergiz Şahin Solmaz (Istanbul Technical University)

Aykut Kabaoǧlu (Istanbul Technical University)

Mustafa Berke Yelten (Istanbul Technical University)

Affiliation
External organisation
DOI related publication
https://doi.org/10.1109/SMACD.2019.8795230
More Info
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Publication Year
2019
Language
English
Affiliation
External organisation
Pages (from-to)
21-24
ISBN (electronic)
9781728112015

Abstract

Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

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