Design of a Readout Scheme for a MEMS Microphone
A. Cheng
R. van Veldhoven – Mentor
K.A.A. Makinwa – Mentor
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Abstract
This design mainly proposes a readout scheme for MEMS microphone with positive feedback to decrease the parasitic capacitance. It is designed in CMOS014 technology with a supply voltage of 3.3 V. The proposed architecture can increase the microphone’s sensitivity with a comparatively low bias voltage. It enables the microphone to achieve high sensitivity even if it is loaded by an amplifier with large input capacitance. In the mean time, the SNR and THD are not affected much. The Spectre simulation shows that the system can achieve 61 dB SNR (A-weighted), 0.5% THD (1Pa sound pressure) and 1 mW power consumption. Several traditional readout schemes for MEMS microphone are also discussed and compared. The scheme which is based on amplitude modulation is tested and measured on PCB level.