A three stage amplifier with quenched multipath frequency compensation for all capacitive loads

Abstract

This paper describes a three-stage CMOS amplifier that is stable for all capacitive loads. This is achieved by adding a so-called quenching capacitor to the multipath nested Miller compensation (MNMC) topology. Theoretical calculations and simulation results are provided to verify the improved stability obtained by the quenched multipath nested Miller compensation (QMNMC) topology. The amplifier is designed in a 0.7-mum CMOS process, and can drive all capacitive loads with a minimum phase margin of 20deg. It has a unity-gain bandwidth of 1MHz, a gain of 90-dB and a slew rate of 0.57 V/mus for 100pF capacitive load. It employs a quenching capacitance of only 18 pF, and dissipates 480 muW from a 3.0 V supply.