Very high-speed CMOS comparators for multi-GS/s A/D converters
Conference Paper
(2015)
Author(s)
Dante Muratore (Pavia University)
Alper Akdikmen (Istanbul Technical University)
Franco Maloberti (Pavia University)
Affiliation
External organisation
DOI related publication
https://doi.org/10.1109/PRIME.2015.7251379
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https://resolver.tudelft.nl/uuid:7683f8a5-77d2-4817-a0f4-3912cf5b6c28
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Publication Year
2015
Language
English
Affiliation
External organisation
Pages (from-to)
240-243
ISBN (electronic)
9781479982295
Abstract
Ultra high-speed comparators for data-converters operating with conversion rate of 10+ GS/s are discussed. It is shown that the use of nanometer technologies and specific architectures allow comparator speeds in the 30 ps range or below. State-of-the-art schemes of latch are critically analysed and strategies for enhancing the speed are discussed. A novel scheme, the latch with embedded preamp, increases the speed of the fast scheme by almost a factor 2.
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