Voltage Sharing Improvement Methods in Series-Connected MOSFETS for Future Grid High Voltage Applications

Preprint (2023)
Author(s)

W. Zhao (TU Delft - High Voltage Technology Group)

Mohamad Ghaffarian Niasar (TU Delft - High Voltage Technology Group)

P. Vaessen (TU Delft - High Voltage Technology Group)

Gert Rietveld (VSL Dutch Metrology Institute)

Research Group
High Voltage Technology Group
More Info
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Publication Year
2023
Language
English
Research Group
High Voltage Technology Group

Abstract

In the future, series-connected SiC MOSFETs will become widely used in power-electronic-based medium and high voltage (HV) applications such as modular multilevel converters (MMCs). Balanced voltage sharing among the SiC MOSFET string is hard to be achieved due to possible deviation on MOSFET switching delay. In this paper, two types of gate signal delay adjustment methods (gate balancing core and improved RC snubber method) are presented to solve the unbalanced voltage sharing caused by MOSFET turn-off delay differences. The methods are validated with laboratory experiments performed on low-voltage prototypes and a performance comparison of these two approaches is given. Both methods significantly improve the drain-source voltage sharing, but the gate balancing core method is most suitable for HV and high-frequency applications.

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