Thermal Behaviour of a Vertically Stacked GaN-Si Multi-Die Package

Master Thesis (2025)
Author(s)

S.S.B. Zhou (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

O. Bergmann – Mentor (TU Delft - Electronic Components, Technology and Materials)

N. Gupta – Mentor (TU Delft - Electronic Components, Technology and Materials)

Guo-Qi Zhang – Graduation committee member (TU Delft - Electronic Components, Technology and Materials)

J. Dong – Graduation committee member (TU Delft - DC systems, Energy conversion & Storage)

Nick Liu – Graduation committee member (Nexperia)

René Poelma – Graduation committee member (Nexperia)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2025
Language
English
Graduation Date
29-08-2025
Awarding Institution
Delft University of Technology
Programme
['Electrical Engineering']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

With the ever increasing global energy consumption, modern power electronics need to be more energy efficient, have a smaller form factor and have better thermal performance. To achieve this goal, Wide-Bandgap (WBG) semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN), are increasingly used instead of silicon (Si) in power applications such as electric vehicles and chargers. In particular GaN-based devices have a new breakthrough in the form of a vertically stacked GaN-Si cascode, which combines a normally-on GaN High-Electron-Mobility Transistor (HEMT) device with a normally-off Si Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) device stacked on top of the GaN HEMT device. Although the new configuration brought benefits to the table, it brought drawbacks to the thermal management of it: two heat sources stacked on top of each other. This causes both self-heating, but also coupled heating and combined with non-uniform heat dissipation across the device, the thermal behaviour becomes difficult to predict, which leads to suboptimal or over-engineered cooling solutions, reducing reliability and performance or increasing cost.

This thesis aimed to create insight and understanding of the heat dissipation and thermal behaviour inside a vertically stacked GaN-Si cascode. This was achieved by performing FEM simulations on the thermal behaviour in a vertically stacked GaN-Si cascode under different heat dissipation distributions, electrical characterisation of individual GaN HEMT and individual Si MOSFET dies to derive I-V and Ron characteristics, modelling of the heat dissipation and distribution using these electrical characteristics and thermal characterisation of a packaged vertically stacked GaN-Si cascode device using a Temperature-Sensitive Electrical Parameter (TSEP) and the Transient Dual Interface Method (TDIM) to derive Rthj-c under different operating conditions. It was found that the thermal performance was greatly influenced by the heat dissipation distribution and in turn the operating conditions (forward or reverse bias/conduction mode and how much current flows through the device). Based on these findings, recommendations were made to improve and extend the study on this topic, but also recommendations for future studies to improve packaging and cooling solutions.

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