Enhanced Scouting Logic

A Robust Memristive Logic Design Scheme

Conference Paper (2020)
Author(s)

J. Yu (TU Delft - Computer Engineering)

H.A. Du Nguyen (TU Delft - Computer Engineering)

Muath Abu Lebdeh (TU Delft - Computer Engineering)

M. Taouil (TU Delft - Computer Engineering)

S. Hamdioui (TU Delft - Quantum & Computer Engineering)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1109/NANOARCH47378.2019.181296
More Info
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Publication Year
2020
Language
English
Research Group
Computer Engineering
Bibliographical Note
Accepted author manuscript@en
Pages (from-to)
1-6
ISBN (print)
978-1-7281-5521-0
ISBN (electronic)
978-1-7281-5520-3
Reuse Rights

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Abstract

Memristive devices have the potential to reduce the memory access bottleneck in conventional computer architectures. However, memristive devices also suffer from low endurance and large resistance variation. To address these problems, we present a robust logic scheme named Enhanced Scouting Logic (ESL). It produces logic operation results within the peripheral circuit of the memory array. During the execution of logic operations, the resistance states of memristive devices do not change and hence do not affect the memristor lifetime. ESL senses the resistance of input memristive devices via two different paths when different operations such as AND and OR are performed. These different paths guarantee the operation correctness even under large resistance variations. We verified ESL using SPICE simulations and Monte Carlo analysis. Our simulation results show that ESL is more robust as compared with state-of-the-art logic schemes.

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