Design & Simulations of Binnable Pixel Array

Abstract

In various metrological imaging applications, such as astronomical studies and medical applications, the incident illumination from the image is focused densely on certain regions of the image and sparsely spread over others. Ideally, the sensor's pixels have high spatial resolution at regions of interest to provide high resolution and distinguish features of the image. Similarly, larger, low-resolution pixels are preferred in regions of sparsely distributed information.

As pixel readouts form a significant portion of an image sensor's power budget, larger low-power pixels should dominate the background locations to lower the number of readouts and power consumption. Since different applications may have different regions tending to dense and sparse incidence, the presence of high-resolution and low-resolution pixels should be configurable. This work aims to research an image sensor whose spatial resolution is configurable at different locations on the chip.

The primary goal of this thesis work is:
To create a CMOS-based image sensor named FlexCAM with adaptable (by utilizing control gates and proper biasing schemes) resolution modes for:
a) High spatial resolution at regions of interest where the signal is dense. Here, each pixel is read through its amplifier
b) Low spatial resolution at regions where the signal is sparse, utilizing charge binning onto a focal pixel. Here, only the amplifier of the focal pixel is activated, thus reducing power consumption.
Additionally, this thesis will include the optical and electrical design trade-offs, the design of the foundry process flow, and details of the proposed experimental setup. The work also provides preliminary simulations for proof-of-concept for both resolution modes.