A High-energy-efficiency Charge-domain MultiplyAccumulator with Novel Successive Charge Injection Logic for Edge Al Computing in 22 nm

Abstract

Multiply-accumulators are key cornerstone arithmetic blocks for AI accelerators to achieve high energy efficiency, high accuracy and small silicon area, especially for edge accelerators (Fig. 1, left). The trend of edge accelerators is to use Analog and Mixed-Signal (AMS) domain circuits to improve energy efficiency by reducing voltage swing and integrating more operations into one computation unit [16]. Fig. 1 (right) shows the major issues in existing capacitor-based AMS domain Multiply-ACcumulator (MAC) designs: 1) High energy consumption brought by the high-switching-activity digital logic gates and high-voltage-swing charge-domain analog adders [3, 4]; 2) Significant accuracy loss due to the poor linearity from capacitor parasitic and device mismatch [3]; 3) Large area overhead caused by the parallel unit-capacitors in summation [4, 5].