Memristor-based Precision Voltage Generation for Spin-qubit Biasing at 4 K

Abstract

This thesis develops a memristor-based precision quasi-static voltage source for cryogenic spin-qubit biasing, spanning device optimisation, memristor programming, noise characterisation, and system integration. Optimised Pt/Ti/Pt/HfO₂/Pt memristors achieved an ON/OFF ratio of approximately 10², a reduced forming voltage of 2 V, modest tunability of Vset through stack optimisation, and endurance exceeding 10⁵ SET–RESET cycles. The proposed closed-loop PG-ISPP programming improves both convergence speed and robustness to device-to-device variability compared with conventional ISPP, while retaining approximately 1% targeting accuracy. Read-bias-induced resistance drift was used to define the stable operating range of the voltage source and revealed a favourable read voltage for low-disturb operation in other ReRAM applications. Experiments with up to N=6 parallel memristors showed a reduction in resistance noise following an approximate 0.054N^(-1.53) dependence at 300 K. Finally, integration into a TIA-based cryogenic-compatible bipolar voltage-source architecture demonstrated programmable outputs from −0.56 to +0.53 V. The measured output noise followed an approximately σVout ∝ |⟨Vout⟩|^(1.66) dependence. These results establish a device-to-system foundation for scalable memristor-based cryogenic biasing.