Single-Electron-Transistor Compact Model for Spin-Qubit Readout

Conference paper (2023)

Authors

İlke Ercan Electrical Engineering Education - EEMCS
A. Vladimirescu University of California
F. Sebastiano Quantum Circuit Architectures and Technology - EEMCS
Research Group
Electrical Engineering Education (EEMCS) (TU Delft)
Copyright: © 2023 Samantha Van Rijs, İlke Ercan, A. Vladimirescu, F. Sebastiano
DOI
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https://doi.org/10.1109/SMACD58065.2023.10192251
Quantum dots Readout Quantum electronics Macro-model SET Nanoelectronics Spin qubit
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Published Date

2023

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Electrical Engineering Education

Abstract

Quantum computers process information stored in quantum bits (qubits), which must be controlled and read out by a traditional electronic interface. Co-designing and cooptimizing such a quantum-classical complex system requires efficient simulators to emulate the qubits and their interaction with classical electronics. For spin-qubit readout, a single electron transistor (SET) is often employed. To build a toolset that can co-simulate the spin qubit system with the classical control and readout interface, a compact and efficient SET model is needed. This paper presents a new compact empirical SET model based on state-of-the-art SET measurement and extracted by a custom function-fitting python program. Within the target source-drain voltage range of ±1000μV , the model is accurate for circuit (SPICE) simulation. Furthermore, the empirical model is represented by a set of equations that enables instantaneous output response requiring a negligible simulation time. With this new SET model, a quantum-electronics co-simulator such as SPINE can now be enhanced to simulate the readout in addition to the control circuits of spin qubits, thus enabling the design of the complete integrated circuit (IC) required for large-scale quantum computers.