A 252 × 144 SPAD Pixel Flash Lidar with 1728 Dual-Clock 48.8 PS TDCs, Integrated Histogramming and 14.9-to-1 Compression in 180NM CMOS Technology

Conference Paper (2018)
Author(s)

S.A. Lindner (École Polytechnique Fédérale de Lausanne, Universitat Zurich)

C. Zhang (TU Delft - (OLD)Applied Quantum Architectures)

Ivan Michel Antolovic (TU Delft - (OLD)Applied Quantum Architectures)

Martin Wolf (Universitat Zurich)

Edoardo Charbon-Iwasaki-Charbon (Universitat Zurich, École Polytechnique Fédérale de Lausanne)

Research Group
(OLD)Applied Quantum Architectures
DOI related publication
https://doi.org/10.1109/VLSIC.2018.8502386
More Info
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Publication Year
2018
Language
English
Research Group
(OLD)Applied Quantum Architectures
Volume number
2018-June
Pages (from-to)
69-70
ISBN (electronic)
978-153866700-2

Abstract

A 252 × 144 single-photon avalanche diode (SPAD) pixel FLASH LiDAR is implemented in 180nm CMOS with 28.5μm pixel pitch and 28% fill factor. The sensor includes a collision detection bus with dynamic reallocation of 48.8 ps dual-clock time-to-digital converters (TDCs). It can operate in time-correlated single-photon counting (TCSPC), single-photon counting (SPC), peak-detection (PD) and partial-histogramming (PH) modes. The PD and PH modes are enabled by the first implementation of integrated histogramming for a full array via an SRAM based partial histogramming readout (PHR) scheme. This provides 16 5-bit bins for each pixel to enable a 14.9-to-l compression ratio.

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