Hardware Control Architecture for Distributed Diamond Spin Qubits

Master Thesis (2024)
Author(s)

A. Knapen (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

JSSM Wong – Mentor (TU Delft - Computer Engineering)

F Sebasatiano – Graduation committee member (TU Delft - Quantum Circuit Architectures and Technology)

David Elkouss Coronas – Graduation committee member (TU Delft - Quantum Computer Science)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2024
Language
English
Graduation Date
09-07-2024
Awarding Institution
Delft University of Technology
Project
['Fujitsu Project']
Programme
['Computer Engineering']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

In the past several decades, tremendous progress has been made in physics and engineering towards realize practical quantum computers. Several small-scale systems have already been demonstrated which utilize separate, off-the-shelf hardware components to directly control qubits. However, as higher-quality qubits continue to spur the development of larger-scale systems capable of performing complex computations, it is becoming increasingly important to consider how control architectures should be adapted to keep pace. This motivates the design of a scalable control architecture capable of dynamically orchestrating quantum programs on a large number of qubits while maintaining the stringent requirements imposed by qubit coherence times and operation in dilution refrigerators.

In this thesis, several contributions are made towards realizing a control architecture for large-scale quantum computing systems based on distributed Nitrogen-vacancy (NV) centers in diamond. A configurable design is presented which significantly increases system throughput by parallelizing execution of instructions performed on separate distributed nodes. A detailed analysis of the dependencies between instructions in quantum programs at an algorithmic level is also used to develop an heuristic function for evaluating the performance of different hardware designs. Furthermore, the demand for increased complexity of computations is addressed by a microarchitectural design which translates high-level quantum instructions into a set of signals used to configure special-purpose signal generators. Taken together, these microarchitectural components enable highly-efficient generation of signals for performing arbitrary single-qubit rotation gates, a key step towards achieving universal quantum computation.

Additionally, detailed evaluations of the control architecture enhancements are provided. For example, run time analysis is performed on a set of benchmark quantum algorithms to show the significant speedup capabilities and performance tradeoffs of the control architecture's parallel execution model. Moreover, the successful integration of the control architecture with the pre-existing signal generators is verified by executing parameterized microinstructions which configure the signal generators to produce amplitude-modulated, phase-coherent microwave and radio-frequency signals. Finally, the full system functionality is verified using several microprograms which each implement higher-level quantum instructions for single-qubit rotation gates. These demonstrations bridge the end-to-end connection between quantum algorithms and physically-realizable quantum gates in hardware.

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