APX-DREAM-CIM

Abstract

With the increasing demand for energy-efficient solutions in smart edge applications, there is a pressing need for computing architectures that can effectively manage di-verse and computation-intensive workloads. To address this, we propose APX-DREAM-CIM, an approximate digital SRAM-based Computation-In-Memory (CIM) accelerator specifically designed to maximize energy and area efficiency with minimal impact on accuracy by investigating cross-layer optimizations. The architecture uses, on the one hand, quantized models and, on the other hand, integrates a range of approximate adder designs, each offering distinct trade-offs between hard-ware efficiency and computational precision. To further enhance resilience to approximation-induced errors, we introduce a novel Approximate-Aware Training (AAT) methodology, which models the approximate behavior of the hardware during training, enabling the network to adapt accordingly. We evaluate APX-DREAM-CIM using the MNIST and CIFAR-10 datasets with LeNet-5 and ResNet-20 topologies. Experimental results show that APX-DREAM-CIM achieves up to 17% energy and 16% area reduction compared to the exact baseline architecture. Moreover, AAT enables the system to retain, and in some cases, even exceed, the accuracy of standard quantized models.