An Auto-Zero-Stabilized Voltage Buffer With a Quiet Chopping Scheme and Constant Sub-pA Input Current

Journal article (2022)

Authors

C.T. Rooijers Electronic Instrumentation - EEMCS
J.H. Huijsing Electronic Instrumentation - EEMCS
K.A.A. Makinwa Microelectronics
Research Group
Electronic Instrumentation (EEMCS) (TU Delft)
Copyright: © 2022 C.T. Rooijers, J.H. Huijsing, K.A.A. Makinwa
DOI
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https://doi.org/10.1109/JSSC.2021.3127462
Noise folding Auto-zero Digitally assisted AZ loop Low input current Low offset Noise correlation
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Published Date

2022

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Electronic Instrumentation

Abstract

This article describes an auto-zero stabilized voltage buffer that achieves low offset and low noise with sub-pA input current. A high gain stabilization loop is used to periodically cancel the buffer’s offset. The loop itself is periodically disconnected from the buffer and auto-zeroed, during which its bandwidth is reduced to reduce the associated noise folding. However, this also reduces its offset correction range, and so to avoid overloading, its initial offset is digitally trimmed. To break up the correlation between the residual low-frequency (LF) noise of the auto-zero and stabilization phases, the loop is periodically chopped, which significantly reduces the buffer’s LF noise. Finally, the duty-cycle of the two phases is optimized to bring the buffer’s LF noise density close to 2–√ times its white noise density (14 nV/ Hz−−−√ ), which is the fundamental limit of an AZ amplifier. The buffer also achieves a constant and low input current (0.8 pA), as well as a state-of-the-art offset (0.4 μV ).