Engineering silicon spin qubits

Abstract

The dominance of silicon in digital computation inspired the idea that this solid-state environment could also be a "suitable arena" for quantum computation, in the words of Loss and DiVincenzo. Over the past three decades, researchers have established proofs-of-principle that such qubits are adequate for universal quantum computation, and greater attention is now being placed on scaling these demonstrations towards fault-tolerance. Far from being a pejorative "engineering problem", the versatility with which qubits in the solid-state can now be designed and controlled creates a large canvas upon which to build quantum processors, and the process of marrying idealized architectural visions with real-world constraints demands its own type of creativity.

In this thesis, I present a body of work that advances the degree to which the silicon-based spin qubits proposed by Loss and DiVincenzo can be engineered for performing quantum information processing. In contrast to the state-of-play at the outset of my doctoral work, spin qubits and their interactions can now be controlled with both low- and high-frequency pulses in a variety of geometries, and they can be readily transported on-chip. Chapter 2 summarizes how all of these strategies can be understood through the same practical lens for the purposes of designing larger spin-based processors.

Chapters 3-5 comprise the bulk of my doctoral work. First, the heating effect of control signals on spin qubits is investigated, and it is found that spin qubits can be more easily calibrated and controlled by operating them at slightly warmer temperatures than was previously routine in the field. Next, the operation of spin qubits in two-dimensions is explored. By taking advantage of on-chip magnets, we demonstrate that Loss-DiVincenzo silicon spin qubits can be operated at low magnetic fields with low-frequency baseband pulses, and we show that this opens new architectural paradigms. Finally, a new sparse spin qubit array leveraging coherent spin shuttling is commissioned. With this capstone work, the flexible qubit connectivity is used to demonstrate weight-four parity checks, a key ingredient for implementing quantum error-correction, for the first time with spin qubits.

In the outlook of Chapter 6, I discuss how the advancements in this thesis bring the field to the threshold of implementing logical Loss-DiVincenzo spin qubits. Furthermore, the engineering toolkit has progressed sufficiently far to begin realizing more ambitious fault-tolerant architectures in the silicon arena.