A Bootstrapped ESD Structure for CMOS Amplifiers with femtoampere leakage current

A Bootstrapped ESD Structure for CMOS Amplifiers with femtoampere leakage current

Master thesis (2021)

Authors

S. Sharma Electrical Engineering, Mathematics and Computer Science

Contributors

C.T. Rooijers Electronic Instrumentation - EEMCS (supervisor 1)
J.H. Huijsing Electronic Instrumentation - EEMCS (supervisor 1)
K.A.A. Makinwa Microelectronics (supervisor 1)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright: © 2021 Shrinidhi Sharma
Rail-to-Rail Current Spillover Bootstrapped ESD Diode Low input current
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Published Date

29-04-2021

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

Integrated circuits (ICs) are susceptible to damage by Electrostatic Discharge (ESD), which necessitates protection diodes. However, these diodes can cause leakage currents in the range of picoamperes, dominating the input current of CMOS ICs. This thesis presents the implementation of a low leakage bootstrapped ESD protection circuit for amplifiers with low input currents. An auxiliary buffer connected to the input pad is used to drive the voltage across the ESD protection diodes to a near-zero value, thus ensuring leakage currents in the femtoampere range. Two kinds of protection diode structures were designed and characterized. Based on the results, an auxiliary buffer was designed to bootstrap the diodes. Next, the bootstrapped ESD diode structure was taped out and measured. A low leakage test PCB was designed using techniques such as guarding, shielding, and via-fencing, resulting in bare PCB leakage currents well below 20 fA. The ESD protection circuit is fabricated in TSMC 180 nm MS/RF CMOS technology and occupies an area of 0.043mm2. With this circuit, input leakage currents below 150fA have been measured.