Multi-Chip Dataflow Architecture for Massive Scale Biophysically Accurate Neuron Simulation

Conference Paper (2016)
Author(s)

Jaco Hofmann (Technische Universität Darmstadt)

A Zjajo (TU Delft - Signal Processing Systems)

Carlo Galuzzi (Maastricht University)

T.G.R.M. van Leuken (TU Delft - Signal Processing Systems)

Research Group
Signal Processing Systems
DOI related publication
https://doi.org/10.1109/embc.2016.7592053
More Info
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Publication Year
2016
Language
English
Research Group
Signal Processing Systems
Pages (from-to)
5829-5832
ISBN (print)
978-1-4577-0219-8
ISBN (electronic)
978-1-4577-0220-4

Abstract

State-of-the-art neuron simulators are capable of simulating at most few tens/hundreds of neurons in real-time due to the exponential growth in the communication costs with the number of simulated neurons. In this paper, we present a novel, reconfigurable, multi-chip system architecture based on localized communication, which effectively reduces the communication cost to a linear growth. The system is very flexible and it allows to tune, at run-time, various parameters, e.g. the intracellular concentration of chemical compounds, the interconnection scheme between the neurons. Experimental results indicate that the proposed system architecture allows the simulation of up to few thousands biophysically accurate neurons over multiple chips.

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