Cardiovascular diseases are the leading cause of death in the devel- oped world. Preventing these deaths, require long term monitoring and manual inspection of ECG signals, which is a very time consum- ing process. Consequently, a wearable system that can automatically categorize beats is essential. Neuromorphic machines have been introduced relatively recently in the science community. The aim of these machines is to emulate the brain. Their low power design makes them an optimal choice for a low power wearable ECG classifier. As features are crucial in any machine learning system, this thesis aims at proposing an energy efficient feature extraction algorithm for ECG arrhythmia classification using neuromorphic machines. The feature extraction algorithm proposed in this thesis consists of the merger of a low power feature detection and a feature selection algorithm. Also, different network configurations have been investigated to achieve classification using an LSM architecture. The resulting system can accurately cluster seven beat types, has an overall classification rate of 95.5%, and consumes an estimate of 803.62 nW.

One of the challenges of neuromorphic computing is efficiently routing spikes from neurons to their connected synapses. The aim of this thesis is to design a spike-routing architecture for flexible connections on single-chip neuromorphic systems. A model for estimating area, power consumption, memory, spike latency and link utilisation for neuromorphic spike-routing architecture is described. This model leads to the proposal for a new spike-routing architecture with a hybrid addressing scheme and a novel synaptic encoding scheme. The proposed architecture is implemented in a SystemC simulation tool with a supporting tool for encoding arbitrary SNN topologies for the synapse encoding scheme. Running the simulations with synthetic benchmarks and a handwriting recognition SNN shows that the proposed architecture is memory-efficient and provides low latency spike-routing with high synaptic activation concurrency.

Spiking Neural Networks have opened new doors in the world of Neural Networks. This study implements and shows a viable architecture to detect and classify blob-like input data. An architecture consisting of three parts a region proposal network, weight calculations, and the classifier is discussed and implemented. The region proposal network is build based on a blob detecting Laplacian of Gaussian function. The architecture is tested and verified on the Multi MNIST dataset that is generated based on the MNIST dataset that consists of handwritten digits. Results show that, on average, the region proposal network can locate the blobs in the input with an accuracy of within a single pixel distance from the ground truth. Two different ways of decoding the rate data coming from the region proposal network where discussed the Peak based decoder could propose regions even if these regions are situated closely together. A Center of Mass decoder is slightly more accurate than the Peak based decoder but at a higher computational cost and performance degradation when the regions are close together. The region proposal network at worst only accounts for 3.19% of inaccuracy. The implementation shows that the architecture is a viable way of detecting and classifying multiple objects within the input. The data shows that the region proposal network itself is a feasible way of detecting blob-like objects within its input.

The high level of realism of spiking neuron networks and their complexity require a considerable computational resources limiting the size of the realized networks. Consequently, the main challenge in building complex and biologically accurate spiking neuron network is largely set by the high computational and data transfer demands. In this thesis, I implement several efficient models of the spiking neuron with characteristics such as axon conduction delays and spike timing-dependent plasticity in a real-time data-flow learning network. With the performance analysis, the trade-offs between the biophysical accuracy and computation complexity are defined for the different models. The experimental results indicate that the proposed real-time data-flow learning network architecture allows the capacity of over 1,188 (max.6,300, depending on the model complexity) biophysically accurate neurons in a single FPGA device.

As technology scaling enters the nanometer regime, device aging effects cause quality and reliability issues in CMOS Integrated Circuits (ICs), which in turn shorten its lifetime. Evaluating system aging through circuit simulations is very complex and time consuming. In this thesis, a framework is proposed, which allows for the evaluation of long-term aging effects of ICs and the corresponding measures to counteract premature failure. The focus of this work lies in the abstraction of low-level aging models to system-level models, in order to facilitate swift high-level simulation, without any knowledge of underlying circuit dynamics. Two major aging mechanisms, namely Negative Bias Temperature Instability (NBTI) and Channel Hot Carrier (CHC) degradation are considered for analysis. System-level aging management is performed with the prototype of a System-on-Chip (SoC) including a Management Unit (MU), which counteracts aging by employing Dynamic Voltage Scaling (DVS), Dynamic Frequency Scaling (DFS), and Adaptive Body Biasing (ABB). The simulation platform prototype is based on System-C AMS and a 65-nm technology library. This SoC simulation computes path delay using characterized models, which represent the aged behaviour of individual circuit elements. Results show that the obtained values are within 2% of circuit-level simulation values at the cost of a simulation time which is 15x lesser than conventional circuit simulators (e.g. Cadence NCSim).

The Self-Organizing Map (SOM) is an unsupervised neural networktopology that incorporates competitive learning for the classicationof data. In this thesis we investigate the design space of a system incorporating such a topology based on Spiking Neural Networks (SNNs), and apply it to classifying electrocardiogram (ECG) beats. We present novel insights into the characterization of the SOMand its encapsulating system by exploring conguration parameterssuch as learning rate, neuron models, potentiation and depression ratios, and synaptic conductivity parameters by performing high-level architectural simulations of the system whose SNN is developed withthe aim of being implemented using power ecient neuromorphichardware. Due to the amount of manual work needed to monitor and analyze ECG signals when diagnosing cardiovascular problems, and because it is the leading cause of death in the world, an automated, realtime, and low power detection & classication system is essential. Unsupervised and in realtime, this system performs beat detection with an average True Positive Rate (TPR) of 99.10% and a Positive Predictive Value (PPV) of 99.58% and classication of 500 detected beats with a Multidimensional Scaling Error (EMDS) of 0.0169 and a beat recognition percentage of 100%.

Neuromorphic computing can be used to efficiently implement spiking neural networks. Such spiking neural networks can be used in edge AI applications, where low power consumption is paramount. The use of analog components allows for extremely low power implementations. This thesis contributes the designs of an analog spike generator, synaptic elements and an accumulating neuron in 28 nm CMOS technology. The elements are assembled in a neural network and laid out in an SoC. Energy consumption numbers of less than 1 pJ/synaptic operation are achieved in the analog neuromorphic components.

Simulation of brain neurons in real-time using biophysically-meaningful models is a pre-requisite for comprehensive understanding of how neurons process information and communicate with each other, in effect efficiently complementing in-vivo experiments. In spiking neural networks (SNNs), propagated information is not just encoded by the firing rate of each neuron in the network, as in artificial neural networks (ANNs), but, in addition, by amplitude, spike-train patterns, and the transfer rate. The high level of realism of SNNs and more significant computational and analytic capabilities in comparison with ANNs, however, limit the size of the realized networks. Consequently, the main challenge in building complex and biophysically-accurate SNNs is largely posed by the high computational and data transfer demands. Real-Time Multi-Chip Neural Network for Cognitive Systems presents novel real-time, reconfigurable, multi-chip SNN system architecture based on localized communication, which effectively reduces the communication cost to a linear growth. The system use double floating-point arithmetic for the most biologically accurate cell behavior simulation, and is flexible enough to offer an easy implementation of various neuron network topologies, cell communication schemes, as well as models and kinds of cells. The system offers a high run-time configurability, which reduces the need for resynthesizing the system. In addition, the simulator features configurable on- and off-chip communication latencies as well as neuron calculation latencies. All parts of the system are generated automatically based on the neuron interconnection scheme in use. The simulator allows exploration of different system configurations, e.g. the interconnection scheme between the neurons, the intracellular concentration of different chemical compounds (ions), which affect how action potentials are initiated and propagate. @en