Area efficient, High speed parallel counter circuits using charge recycling threshold logic
Conference Paper
(2003)
Author(s)
P Celinski (TU Delft - Microelectronics)
D Abbott (External organisation)
Shao Ku Kao Cotofana (TU Delft - Computer Engineering)
Department
Microelectronics
To reference this document use:
https://resolver.tudelft.nl/uuid:cad6abbb-7e16-43b5-b162-48cf576e19f7
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Publication Year
2003
Language
English
Department
Microelectronics
Pages (from-to)
233-236
ISBN (print)
0-7803-7762-1
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