Integrated Transceiver Circuits for Catheter-Based Ultrasound Probes and Wearable Ultrasound Patches

Abstract

This thesis describes the design, prototyping and experimental evaluation of transceiver ASICs (application-specific integrated circuits) for catheter-based ultrasound probes and wearable ultrasound patches. To reduce the loading effect of micro-coaxial cables in an ICE probe based on capacitive micro-machined ultrasound transducers (CMUTs), an ASIC prototype including element-level high-voltage (HV) pulsers and low-noise transimpedance amplifiers (TIAs) has been implemented. Apart from the low-noise amplification, the proposed design provides continuously variable gain to compensate for the time-dependent attenuation of the received echo signal. This time-gain compensation (TGC) compresses the echo-signal dynamic range (DR) while avoiding imaging artifacts associated with discrete gain steps. Embedding the TGC function in the TIA reduces the output DR, saving power compared to prior solutions that apply TGC after the low-noise amplifier. Besides reducing the loading effect from micro-coaxial cables, ASICs play an important role in achieving cable-count reduction, which is crucial for 3-D imaging catheters, such as forward-looking IVUS probes. Circuit techniques are proposed to implement a prototype ASIC which only requires 4 cables to interface with a 2D piezoelectric transducer array. To address the challenges in interface electronics for WUPs, a prototype ASIC is presented that contains 64 reconfigurable transceiver channels that can interface with different transducer elements by employing channel-parallelizing techniques.