Estimation of the collapse (V_col) and snapback (V_sb) voltages of Capacitive Micromachined Ultrasonic Transducers (CMUTs) is usually performed by extracting C-V curves from low frequency impedance measurements at different bias points. However, impedance analysis in several bias conditions is time-consuming, making this technique unsuitable for wafer-level testing. Additionally, prolonged exposure to high electric fields may lead to charge injection and trapping phenomena in the CMUT in-cavity insulation layers. This paper proposes an adjustment to the conventional impedance analysis technique aimed at enhancing estimation accuracy and introduces a novel technique for fast C-V assessment enabling rapid wafer-level characterization. Results from both techniques are compared, demonstrating the validity of the proposed approaches.

Capacitive micromachined ultrasonic transducers (CMUTs) offer several advantages over standard lead zirconate titanate (PZT) transducers, particularly for implantable devices. To eliminate their typical need for an external bias voltage, we embedded a charge storage layer in the dielectric. The objective of this study was to evaluate the performance of plasma-enhanced chemical vapor deposition (PECVD) Si3N4 and atomic layer deposition (ALD) Al2O3 as materials for the charge storage layer and two different dielectric layer thicknesses, focusing on their application as receivers in a wireless power transfer link. Capacitance-voltage (CV) measurements revealed that Si3N4 has a higher charge storage capacity compared to Al2O3. Additionally, a thicker dielectric layer between the bottom electrode and the charge storage layer (Bdiel) improved both charge trapping and retention, as assessed in dynamic accelerated lifetime transmit (TX)-mode tests. We then analyzed the power conversion performance of the fabricated CMUTs through both simulations and experiments. We performed extensive modeling based on an equivalent circuit derived from electrical impedance measurements of the fabricated CMUTs. The model was used to predict the power conversion efficiency under various conditions, including the charging field strength, the operating frequency, and parasitic series resistance. Power transfer experiments at 1- and 2.4-MHz recorded efficiencies exceeding 80% with an optimally matched load and up to 54% with a purely resistive load. Results confirmed that, with optimal load matching, the efficiency of different CMUT variants is comparable, indicating that the optimal variant should be selected based on additional criteria, such as charge retention time.

Optimal treatment of cancer requires diagnostic methods to facilitate therapy choice and prevent ineffective treatments. Direct assessment of therapy response in viable tumor specimens could fill this diagnostic gap. Therefore, we designed a microfluidic platform for assessment of patient treatment response using tumor tissue slices under precisely controlled growth conditions. The optimized Cancer-on-Chip (CoC) platform maintained viability and sustained proliferation of breast and prostate tumor slices for 7 days. No major changes in tissue morphology or gene expression patterns were observed within this time frame, suggesting that the CoC system provides a reliable and effective way to probe intrinsic chemotherapeutic sensitivity of tumors. The customized CoC platform accurately predicted cisplatin and apalutamide treatment response in breast and prostate tumor xenograft models, respectively. The culture period for breast cancer could be extended up to 14 days without major changes in tissue morphology and viability. These culture characteristics enable assessment of treatment outcomes and open possibilities for detailed mechanistic studies. SIGNIFICANCE: The Cancer-on-Chip platform with a 6-well plate design incorporating silicon-based microfluidics can enable optimal patient-specific treatment strategies through parallel culture of multiple tumor slices and diagnostic assays using primary tumor material.

Ultrasound (US) has recently gained attention for powering and communication with implantable devices due to its short wavelength and low attenuation. However, beam mis-alignments cause a sharp decrease in the amount of transferred power and quality of communication. This work investigates a telemetry protocol that relies on the difference in the phase of the received backscattered signal to precisely focus the US on the implantable device and track it over time. The interrogation signal is generated by a linear phased array probe, and the receiver is a pre-charged collapse-mode Capacitive Micromachined Ultrasound Transducer (CMUT) connected to a load modulation circuit. Using the time/phase reversal tracking algorithm, the RX was located within 300 ms after the first modulation was detected. The ability of the algorithm to track the RX while it is moving was also tested, showing that it can reliably track it up to a speed of 1 mm/s.

The digitization of smart catheters will dramatically increase the demand for reliable and high data transmission in the distal tips. Optical fiber is a good candidate to provide high-speed data transmission. However, the extremely small size of the smart catheter tip, with less than a few millimeters in diameter, hampers the integration of optical fiber connections in the catheter tip. Our work presents a stand-alone optical data link module (ODLM) with a dimension of 240 μm × 280 μm × 420 μm for use in a 1 mm diameter intravascular ultrasound (IVUS) smart catheter. The fabrication of the ODLM is based on the Flex-to-Rigid (F2R) integration technology. In the ODLM, the flexible interconnects reroute the electrical contacts of the flip-chipped vertical-cavity sur-face-emitting laser (VCSEL) to the side of the device. This design enables the ODLM to be mounted on a flex-PCB and fit into a 200-300 μm gap in the IVUS catheter tip. An optical fiber that runs parallel to the catheter shaft is self-aligned to a commercially available VCSEL by inserting it into the through-silicon hole (TSH) of the ODLM. Clear eye diagrams prove the stand-alone ODLM can transmit 25.8 Gb/s, 231-1 Pseudo-Random Binary Sequence (PRBS) when driven through a high-speed bias-tee. The BER test indicates that error-free operation can be achieved at an optical output of around -4 dBm.

Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer‐defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity‐BOX) that contains a patterned BOX layer. The patterned BOX can form a buried microchannels network, or serve as a stop layer and a buried hard‐etch mask, to accurately pattern the device layer while etching it from the backside of the wafer using the cleanroom microfab-rication compatible tools and methods. The use of the cavity‐BOX as a buried hard‐etch mask is demonstrated by applying it for the fabrication of a deep brain stimulation (DBS) demonstrator. The demonstrator consists of a large flexible area and precisely defined 80 μm‐thick silicon islands wrapped into a 1.4 mm diameter cylinder. With cavity‐BOX, the process of thinning and separating the silicon islands was largely simplified and became more robust. This test case illustrates how cavity‐BOX wafers can advance the fabrication of various MEMS devices, especially those with complex geometry and added functionality, by enabling more design freedom and easing the optimization of the fabrication process.

One of the many applications of organ-on-a-chip (OOC) technology is the study of biological processes in human induced pluripotent stem cells (iPSCs) during pharmacological drug screening. It is of paramount importance to construct OOCs equipped with highly compact in situ sensors that can accurately monitor, in real time, the extracellular fluid environment and anticipate any vital physiological changes of the culture. In this paper, we report the co-fabrication of a CMOS smart sensor on the same substrate as our silicon-based OOC for real-time in situ temperature measurement of the cell culture. The proposed CMOS circuit is developed to provide the first monolithically integrated in situ smart temperature-sensing system on a micromachined silicon-based OOC device. Measurement results on wafer reveal a resolution of less than ±0.2 °C and a nonlinearity error of less than 0.05% across a temperature range from 30 to 40 °C. The sensor's time response is more than 10 times faster than the time constant of the convection-cooling mechanism found for a medium containing 0.4 ml of PBS solution. All in all, this work is the first step towards realizing OOCs with seamless integrated CMOS-based sensors capable to measure, in real time, multiple physical quantities found in cell culture experiments. It is expected that the use of commercial foundry CMOS processes may enable OOCs with very large scale of multi-sensing integration and actuation in a closed-loop system manner.

Parylene-C has been used as a substrate and encapsulation material for many implantable medical devices. However, to ensure the flexibility required in some applications, minimize tissue reaction, and protect parylene from degradation in vivo an additional outmost layer of polydimethylsiloxane (PDMS) is desired. In such a scenario, the adhesion of PDMS to parylene is of critical importance to prevent early failure caused by delamination in the harsh environment of the human body. Towards this goal, we propose a method based on creating chemical covalent bonds using intermediate ceramic layers as adhesion promoters between PDMS and parylene.To evaluate our concept, we prepared three different sets of samples with PDMS on parylene without and with oxygen plasma treatment (the most commonly employed method to increase adhesion), and samples with our proposed ceramic intermediate layers of silicon carbide (SiC) and silicon dioxide (SiO₂). The samples were soaked in phosphate-buffered saline (PBS) solution at room temperature and were inspected under an optical microscope. To investigate the adhesion property, cross-cut tape tests and peel tests were performed. The results showed a significant improvement of the adhesion and in-soak long-term performance of our proposed encapsulation stack compared with PDMS on parylene and PDMS on plasma-treated parylene. We aim to use the proposed solution to package bare silicon chips on active implants.