M.M. Kluba
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7 records found
1
Technology platform for advanced neurostimulation implants
The “chip-in-tip” DBS probe
The progress in the field of neurostimulation is impressive, both from a technical as well as from a therapeutic point of view. Nowadays, the electrical stimulation of the nervous system can be used to induce or suppress muscle responses. Additionally, it can also influence hearing, vision, immune system response, pain perception, and even mental state. The number of medical conditions that can be treated using existing or completely new neurostimulation devices is continuously growing. Moreover, well-targeted electrical neuromodulation can help reduce the whole-body side effects, typical for traditional medication therapies. However, the potential of neurostimulation therapy is limited by the relatively slow development of the accompanying technologies. Most commercial neurostimulation implants still consist of a pulse generator encapsulated in a bulky titanium case and lengthy extension cords. Moreover, in some cases, such as deep brain stimulation (DBS), the resolution of the stimulation is also an issue that can cause severe side effects. In this thesis work, a technology platform for the manufacturing and packaging of advanced neurostimulation implants has been developed to enable further bioelectronics miniaturization and improve the stimulation resolution. These goals have been achieved in close collaboration with the InForMed project partners involved in finalizing the joint design, preparing the inter-facility fabrication process, and supplying off-the-shelf technology modules…
...
The progress in the field of neurostimulation is impressive, both from a technical as well as from a therapeutic point of view. Nowadays, the electrical stimulation of the nervous system can be used to induce or suppress muscle responses. Additionally, it can also influence hearing, vision, immune system response, pain perception, and even mental state. The number of medical conditions that can be treated using existing or completely new neurostimulation devices is continuously growing. Moreover, well-targeted electrical neuromodulation can help reduce the whole-body side effects, typical for traditional medication therapies. However, the potential of neurostimulation therapy is limited by the relatively slow development of the accompanying technologies. Most commercial neurostimulation implants still consist of a pulse generator encapsulated in a bulky titanium case and lengthy extension cords. Moreover, in some cases, such as deep brain stimulation (DBS), the resolution of the stimulation is also an issue that can cause severe side effects. In this thesis work, a technology platform for the manufacturing and packaging of advanced neurostimulation implants has been developed to enable further bioelectronics miniaturization and improve the stimulation resolution. These goals have been achieved in close collaboration with the InForMed project partners involved in finalizing the joint design, preparing the inter-facility fabrication process, and supplying off-the-shelf technology modules…
Cavity‐box soi
Advanced silicon substrate with pre‐patterned box for monolithic mems fabrication
Journal article
(2021)
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Marta Maria Kluba, Jian Li, Katja Parkkinen, Marcus Louwerse, Jaap Snijder, Ronald Dekker
Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer‐defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity‐BOX) that contains a patterned BOX layer. The patterned BOX can form a buried microchannels network, or serve as a stop layer and a buried hard‐etch mask, to accurately pattern the device layer while etching it from the backside of the wafer using the cleanroom microfab-rication compatible tools and methods. The use of the cavity‐BOX as a buried hard‐etch mask is demonstrated by applying it for the fabrication of a deep brain stimulation (DBS) demonstrator. The demonstrator consists of a large flexible area and precisely defined 80 μm‐thick silicon islands wrapped into a 1.4 mm diameter cylinder. With cavity‐BOX, the process of thinning and separating the silicon islands was largely simplified and became more robust. This test case illustrates how cavity‐BOX wafers can advance the fabrication of various MEMS devices, especially those with complex geometry and added functionality, by enabling more design freedom and easing the optimization of the fabrication process.
...
Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer‐defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity‐BOX) that contains a patterned BOX layer. The patterned BOX can form a buried microchannels network, or serve as a stop layer and a buried hard‐etch mask, to accurately pattern the device layer while etching it from the backside of the wafer using the cleanroom microfab-rication compatible tools and methods. The use of the cavity‐BOX as a buried hard‐etch mask is demonstrated by applying it for the fabrication of a deep brain stimulation (DBS) demonstrator. The demonstrator consists of a large flexible area and precisely defined 80 μm‐thick silicon islands wrapped into a 1.4 mm diameter cylinder. With cavity‐BOX, the process of thinning and separating the silicon islands was largely simplified and became more robust. This test case illustrates how cavity‐BOX wafers can advance the fabrication of various MEMS devices, especially those with complex geometry and added functionality, by enabling more design freedom and easing the optimization of the fabrication process.
Conference paper
(2019)
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Kambiz Nanbakhsh, Marta Kluba, Barbara Pahl, Florian Bourgeois, Ronald Dekker, Wouter Serdijn, Vasiliki Giagka
Platinum is widely used as the electrode material for implantable devices. Owing to its high biostability and corrosion resistivity, platinum could also be used as the main metallization for tracks in active implants. Towards this goal, in this work we investigate the stability of parylene-coated Pt tracks using passive and active tests. The test samples in this study are Pt-on-SiO 2 interdigitated comb structures. During testing all samples were immersed in saline for 150 days; for passive testing, the samples were left unbiased, whilst for active testing, samples were exposed to two different stress signals: a 5 V DC and a 5 Vp 500 pulses per second biphasic signal. All samples were monitored over time using impedance spectroscopy combined with optical inspection. After the first two weeks of immersion, delamination spots were observed on the Pt tracks for both passive and actively tested samples. Despite the delamination spots, the unbiased samples maintained high impedances until the end of the study. For the actively stressed samples, two different failure mechanisms were observed which were signal related. DC stressed samples showed severe parylene cracking mainly due to the electrolysis of the condensed water. Biphasically stressed samples showed gradual Pt dissolution and migration. These results contribute to a better understanding of the failure mechanisms of Pt tracks in active implants and suggest that new testing paradigms may be necessary to fully assess the long-term reliability of these devices.
...
Platinum is widely used as the electrode material for implantable devices. Owing to its high biostability and corrosion resistivity, platinum could also be used as the main metallization for tracks in active implants. Towards this goal, in this work we investigate the stability of parylene-coated Pt tracks using passive and active tests. The test samples in this study are Pt-on-SiO 2 interdigitated comb structures. During testing all samples were immersed in saline for 150 days; for passive testing, the samples were left unbiased, whilst for active testing, samples were exposed to two different stress signals: a 5 V DC and a 5 Vp 500 pulses per second biphasic signal. All samples were monitored over time using impedance spectroscopy combined with optical inspection. After the first two weeks of immersion, delamination spots were observed on the Pt tracks for both passive and actively tested samples. Despite the delamination spots, the unbiased samples maintained high impedances until the end of the study. For the actively stressed samples, two different failure mechanisms were observed which were signal related. DC stressed samples showed severe parylene cracking mainly due to the electrolysis of the condensed water. Biphasically stressed samples showed gradual Pt dissolution and migration. These results contribute to a better understanding of the failure mechanisms of Pt tracks in active implants and suggest that new testing paradigms may be necessary to fully assess the long-term reliability of these devices.
Abstract
(2019)
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Nasim Bakhshaee Babaroud, Marta Kluba, Ronald Dekker, Wouter Serdijn, Vasiliki Giagka
Active implantable medical devices have been developed for diagnosis, monitoring and treatment of large variety of neural disorders. Since the mechanical properties of these devices need to be matched to the tissue, soft materials, such as polymers are often preferred as a substrate [1]. Parylene is a good candidate, as it is highly biocompatible and it can be deposited/etched using standard Integrated Circuit (IC) fabrication methods/processes. Further, the implantable devices should be smart, a goal that can be accomplished by including ICs. These ICs, often come in the form of additional pre-packaged components that are assembled on the implant in a heterogenous process. Such a hybrid integration, however, does not allow for size minimization, which is so critical in these applications, as otherwise the implants can cause severe damage to the tissue. On the other hand, it is essential that all components are properly packaged to prevent early failure due to moisture penetration [2].
In this work we use a previously developed semi-flexible platform technology based on a Parylene substrate and Pt metallization, which allows integration of electronic components with a flexible substrate in a monolithic process. We use an IC fabrication-based platform that allows for the fabrication of several rigid regions including Application-Specific Integrated Circuits (ASICs) and other components connected to each other by means of flexible interconnects. We aim to add more functionality to this technology and thereby extend it to a platform for a variety of medical applications. An example of such functionality is integrating Light Emitting Diodes (LEDs) for optogenetic stimulation or integrating Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound stimulation or ultrasound wireless power transfer. Since the long-term reliability is critical for implantable devices, we intend to reinforce our implant with an extra Polydimethylsiloxane (PDMS) encapsulation layer that relies on the low viscosity of the uncured rubber to flow in every detail of the surface to prevent void formation [3]. Therefore, this work also focuses on enhancing the adhesion of PDMS to Parylene, as it must remain strong for the required lifetime of the device. ...
In this work we use a previously developed semi-flexible platform technology based on a Parylene substrate and Pt metallization, which allows integration of electronic components with a flexible substrate in a monolithic process. We use an IC fabrication-based platform that allows for the fabrication of several rigid regions including Application-Specific Integrated Circuits (ASICs) and other components connected to each other by means of flexible interconnects. We aim to add more functionality to this technology and thereby extend it to a platform for a variety of medical applications. An example of such functionality is integrating Light Emitting Diodes (LEDs) for optogenetic stimulation or integrating Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound stimulation or ultrasound wireless power transfer. Since the long-term reliability is critical for implantable devices, we intend to reinforce our implant with an extra Polydimethylsiloxane (PDMS) encapsulation layer that relies on the low viscosity of the uncured rubber to flow in every detail of the surface to prevent void formation [3]. Therefore, this work also focuses on enhancing the adhesion of PDMS to Parylene, as it must remain strong for the required lifetime of the device. ...
Active implantable medical devices have been developed for diagnosis, monitoring and treatment of large variety of neural disorders. Since the mechanical properties of these devices need to be matched to the tissue, soft materials, such as polymers are often preferred as a substrate [1]. Parylene is a good candidate, as it is highly biocompatible and it can be deposited/etched using standard Integrated Circuit (IC) fabrication methods/processes. Further, the implantable devices should be smart, a goal that can be accomplished by including ICs. These ICs, often come in the form of additional pre-packaged components that are assembled on the implant in a heterogenous process. Such a hybrid integration, however, does not allow for size minimization, which is so critical in these applications, as otherwise the implants can cause severe damage to the tissue. On the other hand, it is essential that all components are properly packaged to prevent early failure due to moisture penetration [2].
In this work we use a previously developed semi-flexible platform technology based on a Parylene substrate and Pt metallization, which allows integration of electronic components with a flexible substrate in a monolithic process. We use an IC fabrication-based platform that allows for the fabrication of several rigid regions including Application-Specific Integrated Circuits (ASICs) and other components connected to each other by means of flexible interconnects. We aim to add more functionality to this technology and thereby extend it to a platform for a variety of medical applications. An example of such functionality is integrating Light Emitting Diodes (LEDs) for optogenetic stimulation or integrating Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound stimulation or ultrasound wireless power transfer. Since the long-term reliability is critical for implantable devices, we intend to reinforce our implant with an extra Polydimethylsiloxane (PDMS) encapsulation layer that relies on the low viscosity of the uncured rubber to flow in every detail of the surface to prevent void formation [3]. Therefore, this work also focuses on enhancing the adhesion of PDMS to Parylene, as it must remain strong for the required lifetime of the device.
In this work we use a previously developed semi-flexible platform technology based on a Parylene substrate and Pt metallization, which allows integration of electronic components with a flexible substrate in a monolithic process. We use an IC fabrication-based platform that allows for the fabrication of several rigid regions including Application-Specific Integrated Circuits (ASICs) and other components connected to each other by means of flexible interconnects. We aim to add more functionality to this technology and thereby extend it to a platform for a variety of medical applications. An example of such functionality is integrating Light Emitting Diodes (LEDs) for optogenetic stimulation or integrating Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound stimulation or ultrasound wireless power transfer. Since the long-term reliability is critical for implantable devices, we intend to reinforce our implant with an extra Polydimethylsiloxane (PDMS) encapsulation layer that relies on the low viscosity of the uncured rubber to flow in every detail of the surface to prevent void formation [3]. Therefore, this work also focuses on enhancing the adhesion of PDMS to Parylene, as it must remain strong for the required lifetime of the device.
Journal article
(2019)
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Christopher Mountain, Marta Kluba, Lambert Bergers, Jaap Snijder, Ronald Dekker
Accurate alignment between the cavities in cavity-SOI (c-SOI) wafers and lithography on the wafer surface is essential to advanced MEMS production. Existing alignment methods are well defined, but often require specialized equipment or costly software packages available only in professional manufacturing environments. It would be beneficial for the microfabrication world to be able to utilize standard alignment techniques and tools that are easily available also in smaller MEMS fabrication units and especially the majority of research facilities. Therefore, we demonstrate a feasible method for c-SOI wafer alignment using an ASML PAS5500/100 wafer stepper with standard software configuration by relocating ASML alignment markers towards wafer's edges and utilizing a terracing process to reveal them for alignment. Moreover, we characterize the magnitude and behavior of image offset errors that are introduced using this method. The offset error is found to be inversely proportional to the value of the coordinate in each axis, resulting in images being shifted towards the center of the wafer. The measured offset errors are <160 nm, and are suitable for most applications. To further minimize these errors we propose a simple model or database of the offsets. We conclude that this alternative alignment method is feasible for a number of MEMS applications, and could promote increased integration of c-SOI technology into advanced MEMS production.
...
Accurate alignment between the cavities in cavity-SOI (c-SOI) wafers and lithography on the wafer surface is essential to advanced MEMS production. Existing alignment methods are well defined, but often require specialized equipment or costly software packages available only in professional manufacturing environments. It would be beneficial for the microfabrication world to be able to utilize standard alignment techniques and tools that are easily available also in smaller MEMS fabrication units and especially the majority of research facilities. Therefore, we demonstrate a feasible method for c-SOI wafer alignment using an ASML PAS5500/100 wafer stepper with standard software configuration by relocating ASML alignment markers towards wafer's edges and utilizing a terracing process to reveal them for alignment. Moreover, we characterize the magnitude and behavior of image offset errors that are introduced using this method. The offset error is found to be inversely proportional to the value of the coordinate in each axis, resulting in images being shifted towards the center of the wafer. The measured offset errors are <160 nm, and are suitable for most applications. To further minimize these errors we propose a simple model or database of the offsets. We conclude that this alternative alignment method is feasible for a number of MEMS applications, and could promote increased integration of c-SOI technology into advanced MEMS production.
Journal article
(2018)
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Marta Kluba, Bruno Morana, Angel Savov, Henk van Zeijl, Gregory Pandraud, Ronald Dekker
We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in parylene-based flexible thin film. This fully CMOS compatible approach uses optimized DRIE processes and an SiO2 mesh-shaped mask, allowing for the simultaneous definition of micrometer- to millimeter-sized structures without compromising the flexibility of the device. In a single fabrication flow a unique freedom in dimensions of both the flexible film and the silicon islands can be achieved making this new technique ideal for the realization of semi-flexible/foldable implantable devices, where structures of different sizes have to be combined together for the ultimate miniaturization.
...
We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in parylene-based flexible thin film. This fully CMOS compatible approach uses optimized DRIE processes and an SiO2 mesh-shaped mask, allowing for the simultaneous definition of micrometer- to millimeter-sized structures without compromising the flexibility of the device. In a single fabrication flow a unique freedom in dimensions of both the flexible film and the silicon islands can be achieved making this new technique ideal for the realization of semi-flexible/foldable implantable devices, where structures of different sizes have to be combined together for the ultimate miniaturization.
This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step, multidimensional microchannels with various dimensions (width, length, and depth) can be obtained by tuning the process and design parameters. These fully embedded structures enable further wafer processing and integration of electronic components like sensors and actuators in wafers with microchannels.
...
This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step, multidimensional microchannels with various dimensions (width, length, and depth) can be obtained by tuning the process and design parameters. These fully embedded structures enable further wafer processing and integration of electronic components like sensors and actuators in wafers with microchannels.