Wafer-Scale Integration for Semi-Flexible Neural Implant Miniaturization

Journal Article (2018)
Author(s)

Marta Kluba (TU Delft - Electronic Components, Technology and Materials, TU Delft - EKL Processing)

Bruno Morana (TU Delft - Electronic Components, Technology and Materials)

AM Savov (TU Delft - Electronic Components, Technology and Materials)

Henk W. van Zeijl (TU Delft - Electronic Components, Technology and Materials)

Gregory Pandraud (TU Delft - Photovoltaic Materials and Devices)

Ronald Dekker (TU Delft - Electronic Components, Technology and Materials)

Research Group
Electronic Components, Technology and Materials
Copyright
© 2018 M.M. Kluba, B. Morana, A.M. Savov, H.W. van Zeijl, G. Pandraud, R. Dekker
DOI related publication
https://doi.org/10.3390/proceedings2130941
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 M.M. Kluba, B. Morana, A.M. Savov, H.W. van Zeijl, G. Pandraud, R. Dekker
Research Group
Electronic Components, Technology and Materials
Issue number
13
Volume number
2
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Abstract

We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in parylene-based flexible thin film. This fully CMOS compatible approach uses optimized DRIE processes and an SiO2 mesh-shaped mask, allowing for the simultaneous definition of micrometer- to millimeter-sized structures without compromising the flexibility of the device. In a single fabrication flow a unique freedom in dimensions of both the flexible film and the silicon islands can be achieved making this new technique ideal for the realization of semi-flexible/foldable implantable devices, where structures of different sizes have to be combined together for the ultimate miniaturization.