Single-Step CMOS Compatible Fabrication of High Aspect Ratio Microchannels Embedded in Silicon

Conference Paper (2017)
Author(s)

M.M. Kluba (TU Delft - Electronic Components, Technology and Materials)

A Arslan (Philips Healthcare)

R. Stoute (TNO)

James Muganda (Eindhoven University of Technology)

R. Dekker (TU Delft - Electronic Components, Technology and Materials)

Research Group
Electronic Components, Technology and Materials
Copyright
© 2017 M.M. Kluba, A. Arslan, R. Stoute, James Muganda, R. Dekker
DOI related publication
https://doi.org/10.3390/proceedings1040291
More Info
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Publication Year
2017
Language
English
Copyright
© 2017 M.M. Kluba, A. Arslan, R. Stoute, James Muganda, R. Dekker
Research Group
Electronic Components, Technology and Materials
Pages (from-to)
1-4
Reuse Rights

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Abstract

This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step, multidimensional microchannels with various dimensions (width, length, and depth) can be obtained by tuning the process and design parameters. These fully embedded structures enable further wafer processing and integration of electronic components like sensors and actuators in wafers with microchannels.