A power-efficient Delta-Sigma ADC with a passive input stage for audio applications

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Several techniques have been proposed to reduce the swing at the input stage of a CTDSM. One of these is using a simple passive RC input stage. In prior works, this increased in-band quantization noise. In this paper, we use positive feedback to realize complex-conjugate poles with a passive input stage, obtaining the same noise-shaping as an Active-RC-based loop filter. The prototype 16nm chip achieves a peak SNDR=97.6dB and DR=99.5dB with an SNDR FOM=181.2dB and DR FOM=183.0dB in 20kHz bandwidth.