Design and Experimental Validation of a 10 kW H8 Current-Source Inverter for Motor-Drive Applications

Abstract

The continued growth of electrification has stimulated further research into motor drives based on wide-bandgap (WBG) power semiconductors. Their fast switching capability enables operation at higher switching frequencies, potentially reducing the size and mass of passive components. However, the resulting high voltage slew rates in conventional voltage-source inverters (VSIs) can contribute to electromagnetic interference, motor-terminal overvoltages, bearing damage, and accelerated insulation aging. These limitations have renewed interest in the current-source inverter (CSI), whose filtered output voltage inherently mitigates several of these effects. A principal disadvantage of the conventional CSI is its relatively high conduction loss due to additional reverse-voltage-blocking diodes. The H8-CSI-BD addresses this limitation using anti-series MOSFET pairs and provides a dedicated freewheeling path that enables zero-current switching of the inverter-side switches. Despite these advantages, high-power operation of the H8-CSI-BD has not yet been experimentally demonstrated.

This thesis presents the design and experimental evaluation of an H8-CSI-BD hardware prototype intended for 10kW motor-drive operation. An analytical loss comparison predicts an efficiency of 99.61% for the H8-CSI-BD under the selected design conditions, excluding magnetic, PCB, cooling, and auxiliary-circuit losses. Furthermore, a high-frequency equivalent circuit is derived to design an RC snubber with Rs = 6.32 Ω and Cs = 15.8nF for suppressing commutation-induced voltage transients. Experimentally, the snubber reduces the measured peak voltage by approximately 43% and strongly damps the subsequent oscillations. Sensitivity analysis further demonstrates the trade-off between voltage suppression, gate-source voltage overshoot, and additional power loss, and supports increasing the external gate resistance from 2.2Ω to 5Ω. Two hardware iterations are developed, with testing of the first revealing significant magnetic coupling between the high dI/dt commutation loop and nearby low-voltage circuitry. The second iteration therefore employs vertically oriented gate-driver boards and increased separation of the measurement circuitry, reducing the observed magnetic coupling and improving switching reliability. Low-power inverter operation is successfully demonstrated. However, corrupted SDFM current measurements prevented reliable closed-loop regulation of the DC-link current and consequently prevented validation at the intended 10kW operating point. The results nevertheless demonstrate effective commutation-voltage suppression and identify magnetic decoupling and measurement-signal integrity as key design considerations for future high-power H8-CSI-BD implementations.