10-20GHz Quadrature Clock Generation for Quantum Computing Applications

Master Thesis (2024)
Author(s)

J. Wang (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

M. Babaie – Mentor (TU Delft - Electronics)

Fabio Sebastiano – Graduation committee member (TU Delft - Quantum Circuit Architectures and Technology)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2024
Language
English
Graduation Date
27-08-2024
Awarding Institution
Delft University of Technology
Programme
['Electrical Engineering']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

Quadrature clocks have been widely used in both wireless and wireline communication systems. This Master’s project presents a quadrature clock generator operating in the 10 GHz to 20 GHz range, specifically tailored for quantum computing applications. The design utilizes delay lines to generate quadrature clocks, ensuring low phase noise. To control the delay of these lines, the delay difference is extracted by down-converting the high-frequency signal (10-20 GHz) to a baseband frequency (50 MHz) while retaining the phase difference. Quadrature errors are detected using a tunable delay line and a bang-bang phase detector, resulting in a design that is immune to static delay variations between the two delay extraction paths and is power efficient.

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File under embargo until 27-08-2026