Buffer design trade-offs for single electron logic gates
Conference Paper
(2005)
Author(s)
CR Lageweg (TU Delft - Computer Engineering)
Sorin D. Cotofana (TU Delft - Computer Engineering)
S Vassiliadis (TU Delft - Computer Engineering)
Research Group
Computer Engineering
To reference this document use:
https://resolver.tudelft.nl/uuid:eff59393-d9f8-416d-b2de-ab5fe4fd2795
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Publication Year
2005
Research Group
Computer Engineering
Bibliographical Note
editors onbekend, sb@en
Pages (from-to)
433-436
ISBN (print)
0-7803-9199-3
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