The Current system design of mobile ad hoc networks (MANET), derived from their traditional fixed counterparts, cannot fully meet the requirements inherent to the dynamic nature of such networks. Cross-layer (CL) designs, a modification of the classic protocol stack, are envisioned as a solution for this problem. Many CL design approaches are proposed, each for a different optimization purpose. Mobile terminals require a variety of optimizations that can be provided only by using different CL designs. Consequently, the coexistence and interaction of such designs needs attention. The lack of common interface and infrastructure among different CL designs, however, makes their interaction a significant problem. The proposed common interaction infrastructure is able to compensate for the negative effects introduced by particular CL design by using runtime information from all CL implementations involved in the system. This paper first presents an analysis of the weaknesses of standalone CL designs. Furthermore, this paper introduces a novel architecture to ensure optimal interaction of multiple CL designs according to different QoS requirements. A piggybacked signaling protocol using XML based internal messaging format is introduced. The proposed architecture and three CL designs were simulated for various network scenarios and compared in terms of delay and network efficiency (using the throughput percentage). The results show that the performance with the interaction framework is averagely within 3% to that of the best individual case and maybe up to 4.5% better. In addition, the QoS requirements are always respected.

In this paper, we introduce the concept of flux caches envisioned to improve processor performance by dynamically changing the cache organization and implementation. Contrary to the traditional approaches, processors designed with flux caches instead of assuming a hardwired cache organization change their cache ¿design¿ on program demand. Consequently program (data and instruction) dynamic behavior determines the cache hardware design. Experimental results to confirm the flux caches potential are also presented.