Design Space Exploration of Current-Starved Ring Oscillators Based on Graphene Nanoribbons
Florin Silviu Dumitru (Politehnica University of Bucharest)
N. Cucu Laurenciu (TU Delft - Computer Engineering, Radboud Universiteit Nijmegen)
Alexandru Antonescu (Politehnica University of Bucharest)
S.D. Cotofana (TU Delft - Computer Engineering)
Marius Enachescu (Politehnica University of Bucharest)
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Abstract
Graphene is well-suited for ultra-low-power (ULP) nano-electronics due to its exceptional characteristics like ballistic transport and its ability to engineer structures fea-turing a geometry-induced bandgap. Identifying the conditions necessary for achieving the maximum level of performance and of power-efficiency frequently requires a design space exploration (DSE). By means of calibration and external regulation of the supply voltage, the ULP graphene-nanoribbon (GNR) ring oscillator presented in this paper is capable of exceeding the performance of its 7 nm FinFET counterpart both in terms of maximum frequency and of power-efficiency. Under nominal supply voltage conditions we achieve a 1.89× higher output frequency while simultaneously reducing the power consumption by 553.8× and achieving a 812× higher power efficiency. After performing a DSE and lever-aging both externally-applied supply voltage modulation and output frequency calibration we achieved a 4.81× higher maximum output frequency operation mode and a 242× higher maximum power-efficiency operation mode when configuring both blocks for peak performance for each mode.
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