Spintronic logic

from transducers to logic gates and circuits

Conference Paper (2023)
Author(s)

Christoph Adelmann (IMEC-Solliance)

F. Ciubotaru (IMEC-Solliance)

F. Meng (IMEC-Solliance, Katholieke Universiteit Leuven)

Shao Ku Kao Cotofana (TU Delft - Computer Engineering)

Sebastien Couet (IMEC-Solliance)

Research Group
Computer Engineering
Copyright
© 2023 C. Adelmann, F. Ciubotaru, F. Meng, S.D. Cotofana, S. Couet
DOI related publication
https://doi.org/10.1109/INTERMAGShortPapers58606.2023.10228488
More Info
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Publication Year
2023
Language
English
Copyright
© 2023 C. Adelmann, F. Ciubotaru, F. Meng, S.D. Cotofana, S. Couet
Research Group
Computer Engineering
ISBN (electronic)
9798350338362
Reuse Rights

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Abstract

While magnetic solid-state memory has found commercial applications to date, magnetic logic has rather remained on a conceptual level so far. Here, we discuss open challenges of different spintronic logic approaches, which use magnetic excitations for computation. While different logic gate designs have been proposed and proof of concept experiments have been reported, no nontrivial operational spintronic circuit has been demonstrated due to many open challenges in spintronic circuit and system design. Furthermore, the integration of spintronic circuits in CMOS systems will require the usage of transducers between the electric (CMOS) and magnetic domains. We show that these transducers can limit the performance as well as the energy consumption of hybrid CMOS-spintronic systems. Hence, the optimization of transducer efficiency will be a major step towards competitive spintronic logic system.

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