Non-Volatile Look-up Table Based FPGA Implementations

Conference Paper (2016)
Author(s)

Lei Xie (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Hoang Anh Du Nguyen (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Mottaqiallah Taouil (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Said Hamdioui (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Koen Bertels (TU Delft - Electrical Engineering, Mathematics and Computer Science, TU Delft - FTQC/Bertels Lab)

Mohammad Alfailakawi (American University of Middle-East)

Research Group
Computer Engineering
More Info
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Publication Year
2016
Language
English
Research Group
Computer Engineering
ISBN (electronic)
978-1-5090-4900-4
Event
IDT 2016 : 11th International Design & Test Symposium (2016-12-18 - 2016-12-20), Hammamet, Tunisia
Downloads counter
157

Abstract

Many emerging technologies are under investigation to realize alternatives for future scalable electronics. Memristor is one of the most promising candidates due to memrsitor’s non-volatility, high integration density, near-zero standby power consumption, etc. Memristors have been recently utilized in non-volatile memory, neuromorphic system, resistive computing architecture, and FPGA to name but a few. An FPGA typicallyconsists of configurable logic blocks (CLBs), programmableinterconnects, configuration, and block memories. Most of therecent work done was focused on using memristor to build FPGA interconnects and memories. This paper proposes two novel FPGA implementations that utilize memristor-based CLBs and their corresponding automatic design flow. To illustrate the potential of the proposed implementations, they are benchmarked using Toronto 20, and compared with the state-of-the-art in terms of area and delay. The experimental results show that both the area (up to 4.24x) and delay (up to 1.46x) of the novel FPGAs
are very promising.

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