Unsupervised Wafer Map Failure Pattern Recognition with Contrastive Learning

Unsupervised Wafer Map Failure Pattern Recognition with Contrastive Learning

Liu, Kevin (TU Delft Electrical Engineering, Mathematics and Computer Science)

Lensink, Leonard (mentor)
Wang, Q. (graduation committee)
Driessen, Jan (graduation committee)

Delft University of Technology

Electrical Engineering | Embedded Systems

2023-10-30

This master’s thesis explores the application of Self-Supervised Contrastive Learning (SSCL), specifically the SimCLR algorithm, to enhance feature representation learning from Wafer Bin Maps (WBM) in the semiconductor manufacturing process. The motivation stems from the industry’s growing need for automated defect detection and root-cause analysis as electronic devices become more complex. Traditional manual inspection methods fall short in meeting these demands due to cost and time constraints. The study successfully leverages SSCL to extract meaningful feature representations, optimizing label efficiency and improving defect pattern recognition. Furthermore, a comprehensive pipeline for analysis on Nexperia’s data is established, including data acquisition, preprocessing, training, testing, and interactive visualization of feature spaces. The research contributes to the automation of wafer map inspection, resulting in potential cost savings and enhanced process control in semiconductor manufacture

Contrastive Learning
Wafer Map Failure Pattern Recognition
Representation Learning
Self-supervised learning
Unsupervised Learning

http://resolver.tudelft.nl/uuid:0c1b6b6d-a4c9-4175-98f7-168f484ad4e0

Student theses

master thesis

© 2023 Kevin Liu