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AbuHamra, Nada (author), Abunahla, H.N. (author), Ali, Ashraf (author), Waheed, Waqas (author), Mahmoud, Saleh T. (author), AlAzzam, Anas (author), Mohammed, Baker (author)
In recent years, there has been a growing interest in investigating the potential of emerging memristor (MR) devices for gas sensing applications, particularly at room temperature. This article reports on a planar Au/reduced graphene oxide (rGO)/Au memristive hydrogen sensor, fabricated on a cost-effective cyclic olefin copolymer (COC)...
journal article 2023
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Alfaro Barrantes, J.A. (author), Mastrangeli, Massimo (author), Thoen, David (author), Visser, Sten (author), Bueno Lopez, J. (author), Baselmans, J.J.A. (author), Sarro, Pasqualina M (author)
This paper describes the microfabrication and electrical characterization of aluminum-coated superconducting through-silicon vias (TSVs) with sharp superconducting transition above 1 K. The sharp superconducting transition was achieved by means of fully conformal and void-free DC-sputtering of the TSVs with Al, and is here demonstrated in up...
journal article 2021
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Quiros Solano, W.F. (author), Gaio, N. (author), Silvestri, C. (author), Arik, Y.B. (author), Stassen, O.M.J.A. (author), van der Meer, A.D. (author), Bouten, C.V.C. (author), van den Berg, A. (author), Dekker, R. (author), Sarro, Pasqualina M (author)
We present a novel method to easily and reliably transfer highly porous, large area, thin microfabricated Polydimethylsiloxane (PDMS) porous membranes on Lab-on-Chip (LOC) and Organ-on-Chip (OOC) devices. The use of silicon as carrier substrate and a water-soluble sacrificial layer allows a simple and reproducible transfer of the membranes to...
conference paper 2018
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Vollebregt, S. (author), Alfano, B. (author), Ricciardella, F. (author), Giesbers, A.J.M. (author), Hagendoorn, Y. (author), van Zeijl, H.W. (author), Polichetti, T (author), Sarro, Pasqualina M (author)
In this paper we report a novel transfer-free graphene fabrication process, which does not damage the graphene layer. Uniform graphene layers on 4" silicon wafers were deposited by chemical vapor deposition using the CMOS compatible Mo catalyst. Removal of the Mo layer after graphene deposition results in a transfer-free and controlled placement...
conference paper 2016
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