Sintering Process Simulation of Ag Nanoparticles by Phase Field Method

Low-temperature sintering technology of Ag nanoparticles is widely used in high-power electronic device packaging. Utilizing simulation methods to comprehend and control the microstructure and properties of Ag sintering materials has emerged as a prominent research area. This work uses the General Form PDE module in COMSOL to simplify the...

ROM-FOM Interface Optimization for Efficient Thermomechanical Simulations of Electronic Components

Model order reduction techniques are developed and utilized to make numerical simulations more efficient. The use of Reduce Order Models (ROM) also enables data exchange with external parties without disclosing the sensitive information present in a Full-Order Model (FOM). It is crucial to optimize for both the efficiency and accuracy of a ROM...

PMUT-Powered Photoacoustic Detection: Revolutionizing Microfluidic Concentration Measurements

This report introduces a novel optofluidic platform based on piezo-MEMS technology, capable of identifying subtle variations in the fluid concentration. The system utilizes piezoelectric micromachined ultrasound transducers (PMUTs) as receivers to capture sound waves produced by nanosecond photoacoustic (PA) pulses emanating from a fluid...

A Self Bias-flip Piezoelectric Energy Harvester Array without External Energy Reservoirs achieving 488% Improvement with 4-Ratio Switched-PEH DC-DC Converter

With the advent of the lnternet-of-Things (1oT) era, sensor nodes are required in almost all fields to achieve a better interaction between humans and the environment. Piezoelectric energy harvester (PEH), which exhibits an equivalent electrical model of an AC current source /P in parallel with the inherent capacitor CP, is a promising...

A novel method to transfer porous PDMS membranes for high throughput Organ-on-Chip and Lab-on-Chip assembly

We present a novel method to easily and reliably transfer highly porous, large area, thin microfabricated Polydimethylsiloxane (PDMS) porous membranes on Lab-on-Chip (LOC) and Organ-on-Chip (OOC) devices. The use of silicon as carrier substrate and a water-soluble sacrificial layer allows a simple and reproducible transfer of the membranes to...

A transfer-free wafer-scale CVD graphene fabrication process for MEMS/NEMS sensors

In this paper we report a novel transfer-free graphene fabrication process, which does not damage the graphene layer. Uniform graphene layers on 4" silicon wafers were deposited by chemical vapor deposition using the CMOS compatible Mo catalyst. Removal of the Mo layer after graphene deposition results in a transfer-free and controlled placement...