Shadow-wall lithography of ballistic superconductor–semiconductor quantum devices

The realization of hybrid superconductor–semiconductor quantum devices, in particular a topological qubit, calls for advanced techniques to readily and reproducibly engineer induced superconductivity in semiconductor nanowires. Here, we introduce an on-chip fabrication paradigm based on shadow walls that offers substantial advances in device...

Selectivity Map for Molecular Beam Epitaxy of Advanced III-V Quantum Nanowire Networks

Selective-area growth is a promising technique for enabling of the fabrication of the scalable III-V nanowire networks required to test proposals for Majorana-based quantum computing devices. However, the contours of the growth parameter window resulting in selective growth remain undefined. Herein, we present a set of experimental techniques...

Field effect enhancement in buffered quantum nanowire networks

III-V semiconductor nanowires have shown great potential in various quantum transport experiments. However, realizing a scalable high-quality nanowire-based platform that could lead to quantum information applications has been challenging. Here, we study the potential of selective area growth by molecular beam epitaxy of InAs nanowire...