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Haron, M.A.B. (author), Yu, J. (author), Nane, R. (author), Taouil, M. (author), Hamdioui, S. (author), Bertels, K.L.M. (author)One of the most important constraints of today’s architectures for data-intensive applications is the limited bandwidth due to the memory-processor communication bottleneck. This significantly impacts performance and energy. For instance, the energy consumption share of communication and memory<br/>access may exceed 80%. Recently, the concept of...conference paper 2016
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Yu, J. (author), Du Nguyen, H.A. (author), Xie, L. (author), Taouil, M. (author), Hamdioui, S. (author)CMOS technology and its continuous scaling have made electronics and computers accessible and affordable for almost everyone on the globe; in addition, they have enabled the solutions of a wide range of societal problems and applications. Today, however, both the technology and the computer architectures are facing severe challenges/walls making...conference paper 2018
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Yu, J. (author), Du Nguyen, H.A. (author), Abu Lebdeh, M.F.M. (author), Taouil, M. (author), Hamdioui, S. (author)Automata Processor (AP) is a special implementation of non-deterministic finite automata that performs pattern matching by exploring parallel state transitions. The implementation typically contains a hierarchical switching network, causing long latency. This paper proposes a methodology to split such a hierarchical switching network into...conference paper 2019
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Hamdioui, S. (author), Du Nguyen, H.A. (author), Taouil, M. (author), Sebastian, Abu (author), Le Gallo, Manuel (author), Pande, Sandeep (author), Schaafsma, Siebren (author), Catthoor, Francky (author), Das, Shidhartha (author), G. Redondo, Fernando (author), Karunaratne, G. (author), Rahimi, Abbas (author), Benini, Luca (author)Today's computing architectures and device technologies are unable to meet the increasingly stringent demands on energy and performance posed by emerging applications. Therefore, alternative computing architectures are being explored that leverage novel post-CMOS device technologies. One of these is a Computation-in-Memory architecture based on...conference paper 2019
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Cardoso Medeiros, G. (author), Taouil, M. (author), Fieback, M. (author), Bolzani Poehls, L. M. (author), Hamdioui, S. (author)Hard-to-detect faults such as weak and random faults in FinFET SRAMs represent an important challenge for manufacturing testing in scaled technologies, as they may lead to test escapes. This paper proposes a Design-for-Testability (DFT) scheme able to detect such faults by monitoring the bitline swing of FinFET memories. Using only five...conference paper 2019
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Kraak, D.H.P. (author), Agbo, I.O. (author), Taouil, M. (author), Hamdioui, S. (author), Weckx, Pieter (author), Cosemans, Stefan (author), Catthoor, Francky (author)Designers typically add design margins to memories to compensate for their aging. As the aging impact increases with technology scaling, bigger margins become necessary. However, this negatively impacts area, yield, performance, and power consumption. Alternatively, mitigation schemes can be used to reduce the impact of aging. This paper...conference paper 2019
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Kraak, D.H.P. (author), Gürsoy, C.C. (author), Agbo, I.O. (author), Taouil, M. (author), Jenihhin, M. (author), Raik, J. (author), Hamdioui, S. (author)Integrated circuits typically contain design margins to compensate for aging. As aging impact increases with technology scaling, bigger margins are necessary to achieve the desired reliability. However, these increased margins lead to a reduced performance and lower yield. Alternatively, mitigation schemes can be deployed to reduce the aging....conference paper 2019
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Fieback, M. (author), Wu, L. (author), Cardoso Medeiros, G. (author), Aziza, Hassen (author), Rao, S (author), Marinissen, Erik Jan (author), Taouil, M. (author), Hamdioui, S. (author)This paper proposes a new test approach that goes beyond cell-aware test, i.e., device-aware test. The approach consists of three steps: defect modeling, fault modeling, and test/DfT development. The defect modeling does not assume that a defect in a device (or a cell) can be modeled electrically as a linear resistor (as the traditional approach...conference paper 2019
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Hamdioui, S. (author), Fieback, M. (author), Nagarajan, S. (author), Taouil, M. (author)Today's computing architectures and device technologies are incapable of meeting the increasingly stringent demands on energy and performance posed by evolving applications. Therefore, alternative novel post-CMOS computing architectures are being explored. One of these is a Computation-in-Memory (CIM) architecture based on memristive devices; it...conference paper 2019
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Köylü, T.C. (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Taouil, M. (author)Physical fault injection attacks are becoming an important threat to computer systems, as fault injection equipment becomes more and more accessible. In this work, we propose a new strategy to detect fault attacks in cryptosystems. We use a recurrent neural network (RNN) to detect problems in the program flow caused by injected faults. Our...conference paper 2020
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Wu, L. (author), Fieback, M. (author), Taouil, M. (author), Hamdioui, S. (author)This paper introduces a new test approach: device-aware test (DAT) for emerging memory technologies such as MRAM, RRAM, and PCM. The DAT approach enables accurate models of device defects to obtain realistic fault models, which are used to develop high-quality and optimized test solutions. This is demonstrated by an application of DAT to pinhole...conference paper 2020
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Ghasempouri, Tara (author), Raik, Jaan (author), Paul, Kolin (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Taouil, M. (author)In the recent years, cache based side-channel attacks have become a serious threat for computers. To face this issue, researches have been looking at verifying the security policies. However, these approaches are limited to manual security verification and they typically work for a small subset of the attacks. Hence, an effective verification...conference paper 2020
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Reinbrecht, Cezar (author), Hamdioui, S. (author), Taouil, M. (author), Niazmand, Behrad (author), Ghasempouri, Tara (author), Raik, Jaan (author), Sepulveda, Johanna (author)Cache attacks are one of the most wide-spread and dangerous threats to embedded computing systems' security. A promising approach to detect such attacks at runtime is to monitor the System-on-Chip (SoC) behavior. However, designing a secure SoC capable of detecting such attacks is very challenging: the monitors should be lightweight in order...conference paper 2020
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Masoumian, S. (author), Selimis, Georgios (author), Maes, Roel (author), Schrijen, Geert-Jan (author), Hamdioui, S. (author), Taouil, M. (author)In this paper, we develop an analytical PUF model based on a compact FinFET transistor model that calculates the PUF stability (i.e. PUF static noise margin (PSNM)) for FinFET based SRAMs. The model enables a quick design space exploration and may be used to identify critical parameters that affect the PSNM. The analytical model is validated...conference paper 2020
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Cardoso Medeiros, G. (author), Cem Gursoy, Cemil (author), Wu, L. (author), Fieback, M. (author), Jenihhin, Maksim (author), Taouil, M. (author), Hamdioui, S. (author)Manufacturing defects can cause faults in FinFET SRAMs. Of them, easy-to-detect (ETD) faults always cause incorrect behavior, and therefore are easily detected by applying sequences of write and read operations. However, hard-to-detect (HTD) faults may not cause incorrect behavior, only parametric deviations. Detection of these faults is of...conference paper 2020
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Reinbrecht, Cezar (author), Aljuffri, A.A.M. (author), Hamdioui, S. (author), Taouil, M. (author), Forlin, Bruno E. (author), Sepulveda, Johanna (author)Multi-Processor System-on-Chips (MPSoCs) are popular computational platforms for a wide variety of applications due to their energy efficiency and flexibility. Like many other platforms they are vulnerable to Side Channel Attacks (SCAs). In particular, Logical SCAs (LSCAs) are very powerful as sensitive information can be retrieved by simply...conference paper 2020
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Wu, L. (author), Rao, Siddharth (author), Taouil, M. (author), Marinissen, Erik Jan (author), Kar, Gouri Sankar (author), Hamdioui, S. (author)As a unique mechanism for MRAMs, magnetic coupling needs to be accounted for when designing memory arrays. This paper models both intra- and inter-cell magnetic coupling analytically for STT-MRAMs and investigates their impact on the write performance and retention of MTJ devices, which are the data-storing elements of STT-MRAMs. We present...conference paper 2020
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Yu, J. (author), Abu Lebdeh, M.F.M. (author), Du Nguyen, H.A. (author), Taouil, M. (author), Hamdioui, S. (author)Conventional computing architectures and the CMOS technology that they are based on are facing major challenges such as the memory bottleneck making the memory access for data transfer a major killer of energy and performance. Computation-in-memory (CIM) paradigm is seen as a potential alternative that could alleviate such problems by adding...conference paper 2020
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Copetti, Thiago (author), Cardoso Medeiros, G. (author), Taouil, M. (author), Hamdioui, S. (author), Poehls, Leticia Bolzani (author), Balen, Tiago (author)Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS...conference paper 2020
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Taouil, M. (author), Reinbrecht, Cezar (author), Hamdioui, S. (author), Sepulveda, Johanna (author)Dynamic Random Access Memory (DRAM)-based systems are widely used in mobile and portable applications where low-cost and high-storage memory capability are required. However, such systems are prone to attacks. A latent threat to DRAM-based system security is the so-called Rowhammer attacks. By repeatedly accessing memory, an attacker is able to...conference paper 2021