Hybrid Wafer-Level Packaging for RF-MEMS and Optoelectronic Applications

The current trend in electronic packaging research is to integrate more functions into one package, reduce electrical path parasitic, and increase the heat conduction in order to make the final packaged system smaller, more reliable, more functional and more complete, while keeping the packaging cost low. In this trend, unconventional devices ...

Substrate Crosstalk Suppression Using Wafer-Level Packaging: Metalized Through-Substrate Trench Approach

The demand for miniaturization technology has been increasing over the last decades. Consumer electronics end-users often, if not always, go for more functionality and practicality. This is translated into systems that are more complex and yet smaller in size such as smart cellular phones and portable audio/video systems. System on Chip (SoC) is...