Searched for: faculty%3A%22Electrical+Engineering%22
(1 - 3 of 3)
document
Ishihara, R. (author), Baiano, A. (author), Chen, T. (author), Derakhshandeh, J. (author), Tajari Mofrad, M.R. (author), Danesh, M. (author), Saputra, N. (author), Long, J. (author), Beenakker, C.I.M. (author)
Single-grain Si TFTs have been fabricated using accurate 2D location control of large Si grain with the ?-Czochralski process. TFTs fabricated inside the crystalline islands of 6 ?m show a mobility (600cm2/Vs) as high as that of the SOI counterpart, despite of the low-temperature (<350oC) process. By applying a tensile stress into the grain, the...
journal article 2009
document
Saputra, N. (author), Danesh, M. (author), Baiano, A. (author), Ishihara, R. (author), Long, J.R. (author), Karaki, N. (author), Inoue, S. (author)
journal article 2008
document
Baiano, A. (author), Ishihara, R. (author), Saputra, N. (author), Long, J. (author), Karaki, N. (author), Inoue, S. (author), Metselaar, W. (author), Beenakker, C.I.M. (author)
Single Grain Thin-film transistors (SG-TFTs) fabricated inside a location-controlled grain by ยต-Czochralski process have as high as SOI performance. To model them, BSIMSOI with a proper modification of the mobility is proposed. The model has been verified for n- and p-channel DC and low frequency AC conditions by comparison with measurement...
journal article 2007