High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology

We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P⁺/Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus...

A first single-photon avalanche diode fabricated in standard SOI CMOS technology with a full characterization of the device

This paper reports on the first implementation of a single-photon avalanche diode (SPAD) in standard silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. The SPAD is realized in a circular shape, and it is based on a P+/N-well junction along with a P-well guard-ring structure formed by lateral diffusion of two...

Architecture and applications of a high resolution gated SPAD image sensor

We present the architecture and three applications of the largest resolution image sensor based on single-photon avalanche diodes (SPADs) published to date. The sensor, fabricated in a high-voltage CMOS process, has a resolution of 512 × 128 pixels and a pitch of 24 ?m. The fill-factor of 5% can be increased to 30% with the use of microlenses....

Measurement and modeling of microlenses fabricated on single-photon avalanche diode arrays for fill factor recovery

Single-photon avalanche diode (SPAD) imagers typically have a relatively low fil factor, i.e. a low proportion of the pixel’s surface is light sensitive, due to in-pixel circuitry. We present a microlens array fabricated on a 128x128 single-photon avalanche diode (SPAD) imager to enhance its sensitivity. The benefit and limitations of these...