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Versluis, Niels (author)Elliptic Curve Cryptography (ECC) performance is a major performance bottleneck when serving many VPN clients from a single server on a low-frequency FPGA softcore CPU. Using an area-efficient Elliptic Curve Point (ECP) multiplication accelerator core on the same FGPA, a much higher amount of clients can be served using the same FPGA chip. Using...master thesis 2020
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Optimizing Memory Mapping for Dataflow Inference Accelerators: Efficient Memory Utilization on FPGAsKroes, Mairin (author)Convolutional Neural Network (CNN) inference has gained a significant amount of traction for performing tasks like speech recognition and image classification. To improve the accuracy with which these tasks can be performed, CNNs are typically designed to be deep, encompassing a large number of neural network layers. As a result, the...master thesis 2020
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Berkers, Martijn (author)The application of accelerators in HPC applications has seen enormous growth in the last decade. In the field of HPC demands on throughput are steadily growing. <br/>Not all of the algorithms used have a clear HW architecture which performs the best. Our work explores the performance of different HW architectures in solving a convex optimization...master thesis 2020
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Feenstra, Bastiaan (author)In this thesis we explore the acceleration of sorting algorithms on FPGAs using high bandwidth memory (HBM). The target application is an FPGA as an accelerator in an OpenCAPI enabled system, that enables the accelerator to access main memory of the host at a bandwidth of 25 GB/s for either read or write. We explore under what read and write...master thesis 2020
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Castro do Amaral, G. (author), Calliari, Felipe (author), Lunglmayr, Michael (author)Trend break detection is a fundamental problem that materializes in many areas of applied science, where being able to identify correctly, and in a timely manner, trend breaks in a noisy signal plays a central role in the success of the application. The linearized Bregman iterations algorithm is one of the methodologies that can solve such a...journal article 2020
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Voss, Nils (author), Ziegenhein, Peter (author), Vermond, Lukas (author), Hoozemans, J.J. (author), Mencer, Oskar (author), Oelfke, Uwe (author), Luk, Wayne (author), Gaydadjiev, G. (author)We propose a novel reconfigurable hardware architecture to implement Monte Carlo based simulation of physical dose accumulation for intensity-modulated adaptive radiotherapy. The long term goal of our effort is to provide accurate dose calculation in real-time during patient treatment. This will allow wider adoption of personalised patient...journal article 2020
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Fang, J. (author), Chen, Jianyu (author), Lee, Jinho (author), Al-Ars, Z. (author), Hofstee, H.P. (author)To best leverage high-bandwidth storage and network technologies requires an improvement in the speed at which we can decompress data. We present a “refine and recycle” method applicable to LZ77-type decompressors that enables efficient high-bandwidth designs and present an implementation in reconfigurable logic. The method refines the write...journal article 2020
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Calliari, Felipe (author), Castro do Amaral, G. (author), Lunglmayr, Michael (author)Detection of level shifts in a noisy signal, or trend break detection, is a problem that appears in several research fields, from biophysics to optics and economics. Although many algorithms have been developed to deal with such a problem, accurate and low-complexity trend break detection is still an active topic of research. The Linearized...journal article 2020
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Fang, J. (author)Though field-programmable gate arrays (FPGAs) have been used to accelerate database systems, they have not been widely adopted for the following reasons. As databases have transitioned to higher bandwidth technology such as in-memory and NVMe, the communication overhead associated with accelerators has become more of a burden. Also, FPGAs are...doctoral thesis 2019
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Houtgast, E.J. (author)Developments in sequencing technology have drastically reduced the cost of DNA sequencing. The raw sequencing data being generated requires processing through computationally demanding suites of bioinformatics algorithms called genomics pipelines. The greatly decreased cost of sequencing has resulted in its widespread adoption, and the amount of...doctoral thesis 2019
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Peltenburg, J.W. (author), van Straten, J. (author), Wijtemans, L. (author), Van Leeuwen, Lars (author), Al-Ars, Z. (author), Hofstee, H.P. (author)Modern big data systems are highly heterogeneous. The components found in their many layers of abstraction are often implemented in a wide variety of programming languages and frameworks. Due to language implementation differences, interfaces between these components, including hardware accelerated components, are often burdened by...conference paper 2019
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Overwater, Ramon (author)The quantum bits (qubits) at the core of any quantum computers are so fragile that quantum error correction(QEC) schemes are needed to increase their robustness and enable fault-tolerant quantum algorithms. The surface code is one of the most popular QEC schemes, but it requires the availability of an efficient decoder. While neural networks...master thesis 2019
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Rueda Arjona, Antonio (author)Embedded control systems are processor-based systems that need to run an application for an extended amount of time, such as months or years. Typically, they implement a realtime function to control a system. Embedded systems are implemented using hardware and software to perform an specific task. This is why they can be optimized to reduce its...master thesis 2019
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de Haan, Erwin (author)Despite its advantages in performance and control, hardware design is mainly bottlenecked by high design complexity and long development time. This thesis explores the use of domain specific languages for high-level synthesis (HLS) of hardware data filters and transformations.<br/>The main goal of this thesis’ prototype is automating the...master thesis 2019
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Wijtemans, Lars (author)vailability of FPGAs is increasing due to cloud service offerings. In the wake of a new in-memory storage format specification, Apache Arrow, FPGAs are increasingly interesting for data processing acceleration in the big data domain. The Fletcher framework can be used to easily develop FPGA accelerated applications that access data stored in...master thesis 2019
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van Leeuwen, Lars (author)With the advent of high-bandwidth non-volatile storage devices, the classical assumption that database analytics applications are bottlenecked by CPUs having to wait for slow I/O devices is being flipped around. Instead, CPUs are no longer able to decompress and deserialize the data stored in storage-focused file formats fast enough to keep up...master thesis 2019
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Misdorp, Alexander (author)Visual perception is a pillar of human life. Visual impairment, therefore, has a severe impact on the quality of life. The Bioelectronic Interface to Sensory Cortex (BISC) project is aimed at building a system capable of both recording and stimulating neurons in order to remedy visual impairment. The proposed BISC system consists of three...master thesis 2019
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Voss, Nils (author), Ziegenhein, Peter (author), Vermond, Lukas (author), Hoozemans, J.J. (author), Mencer, Oskar (author), Oelfke, Uwe (author), Luk, Wayne (author), Gaydadjiev, G. (author)We propose a novel reconfigurable hardware architecture to implement Monte Carlo based simulation of physical dose accumulation for intensity-modulated adaptive radiotherapy. The long term goal of our effort is to provide accurate online dose calculation in real-time during patient treatment. This will allow wider adoption of personalised...conference paper 2019
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Geel, Patrick (author), Kleijweg, Zep (author)This project is to design and implement a reconfigurable measurement interface for Internet of Things sensors, for the Microelectronics Department of the Delft University of Technology. This thesis will discuss the functionality and design process taken in designing such a reconfigurable measurement interface, focusing on generating signals and...bachelor thesis 2019
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Noordam, Leon (author)Modular exponentiation is the basis needed to perform RSA encryption and decryption. Execution of 4096-bit modular exponentiation using an embedded system requires many arithmetic operations. This work aims to improve the performance of modular exponentiation for an existing FPGA platform containing a soft core RISC-V processor. The solution is...master thesis 2019