Single-Electron-Transistor Compact Model for Spin-Qubit Readout

Quantum computers process information stored in quantum bits (qubits), which must be controlled and read out by a traditional electronic interface. Co-designing and cooptimizing such a quantum-classical complex system requires efficient simulators to emulate the qubits and their interaction with classical electronics. For spin-qubit readout,...

Neural-Network Decoders for Quantum Error Correction Using Surface Codes: A Space Exploration of the Hardware Cost-Performance Tradeoffs

Quantum error correction (QEC) is required in quantum computers to mitigate the effect of errors on physical qubits. When adopting a QEC scheme based on surface codes, error decoding is the most computationally expensive task in the classical electronic back-end. Decoders employing neural networks (NN) are well-suited for this task but their...

Characterization and Modeling of Self-Heating in Nanometer Bulk-CMOS at Cryogenic Temperatures

This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient temperature range from 300 K down to 4.2 K. A custom test chip was designed and fabricated for measuring both the temperature rise in the MOSFET channel and in the surrounding silicon substrate, using the gate resistance and silicon diodes as sensors,...

A Cryo-CMOS Digital Cell Library for Quantum Computing Applications

We present a digital cell library optimized for 4.2 K to create controllers that keep quantum processors coherent and entangled. The library, implemented on a standard 40-nm CMOS technology, was employed in the creation of the first 4.2 K RISC-V processor. It has achieved a minimum supply voltage of 590 mV, energy-delay product of 37 fJ/MHz,...

The electronic interface for quantum processors

Quantum computers can potentially provide an unprecedented speed-up with respect to traditional computers. However, a significant increase in the number of quantum bits (qubits) and their performance is required to demonstrate such quantum supremacy. While scaling up the underlying quantum processor is extremely challenging, building the...

SPINE (SPIN Emulator)-A Quantum-Electronics Interface Simulator

A quantum computer comprises a quantum processor and the associated control electronics used to manipulate the qubits at the core of a quantum processor. CMOS circuits placed close to the quantum bits and operating at cryogenic temperatures offer the best solution for the control of millions of qubits. The performance requirements of the...

Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16-μm and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact...

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

Even the quantum simulation of an apparently simple molecule such as Fe2S2 requires a considerable number of qubits of the order of 106, while more complex molecules such as alanine (C3H7NO2) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be...

Mobility-based Time References for Wireless Sensor Networks

Wireless Sensor Networks require small low-cost radios to enable communication among its nodes. Since those radios must be fully integrated to reduce cost and size, integration is required also for their on-board time references, which are needed to achieve synchronization with the other nodes. To deal with the lower accuracy of integrated...