Rapid Design-Space Exploration for Low-Power Manycores under Process Variation utilizing Machine Learning

Design-space exploration for low-power manycore design is a daunting and time-consuming task which requires some complex tools and frameworks to achieve. In the presence of process variation, the problem becomes even more challenging, especially the time associated with trial-and-error selection of the proper options in the tools to obtain the...

Modeling Static Noise Margin for FinFET based SRAM PUFs

In this paper, we develop an analytical PUF model based on a compact FinFET transistor model that calculates the PUF stability (i.e. PUF static noise margin (PSNM)) for FinFET based SRAMs. The model enables a quick design space exploration and may be used to identify critical parameters that affect the PSNM. The analytical model is validated...

System-level sub-20 nm planar and FinFET CMOS delay modelling for supply and threshold voltage scaling under process variation

Standard low power design utilizes a variety of approaches for supply and threshold control to reduce dynamic and idle power. At a very early stage of the design cycle, the V_dd and V_th values are estimated, based on the power budget, and then used to scale the delay and estimate the design performance. Furthermore,...

Time-division Multiplexing Automata Processor

Automata Processor (AP) is a special implementation of non-deterministic finite automata that performs pattern matching by exploring parallel state transitions. The implementation typically contains a hierarchical switching network, causing long latency. This paper proposes a methodology to split such a hierarchical switching network into...

Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era

In this paper, we study the impact of the idle/dynamic power consumption ratio on the effectiveness of a multi-V _dd /frequency manycore design. We propose a new tool called LVSiM (a Low-Power and Variation-Aware Manycore Simulator) to carry out the experiments. It is a novel manycore simulator targeted towards low-power...

Memristive devices for computation-in-memory

CMOS technology and its continuous scaling have made electronics and computers accessible and affordable for almost everyone on the globe; in addition, they have enabled the solutions of a wide range of societal problems and applications. Today, however, both the technology and the computer architectures are facing severe challenges/walls making...

Memory and Communication Profiling for Accelerator-Based Platforms

The growing demand of processing power is being satisfied mainly by an increase in the number of homogeneous and heterogeneous computing cores in a system. Efficient utilization of these architectures demands analysis of memory-access behaviour of applications and perform data-communication aware mapping of applications on these architectures....