Adaptive, low-power architectures for embedded multimedia systems: with focus on H.264/AVC video codec

On virtualization of reconfigurable hardware in distributed systems

A Simulation Framework for Reconfigurable Processors in Large-scale Distributed Systems

Inverse Integer Transform in H.264/AVC Intra-frame Encoder

Targeting Code Diversity with Run-time Adjustable Issue-slots in a Chip Multiprocessor

An Efficient Hardware Design for Intra-prediction in H.264/AVC Decoder

A Novel Dynamic Task Scheduling Algorithm for Grid Networks with Reconfigurable Processors

Low-power, high-throughput deblocking filter for H.264/AVC

A parallel FPGA design of the Smith-waterman traceback

An efficient realization of forward integer transform in H.264/AVC intra-frame encoder

Modeling and simulation of reconfigurable processors in grid networks

A VLIW softcore processor with dynamically adjustable issue-slots

A high-throughput, area-efficient hardware accelerator for adaptive deblocking filter in H.264/AVC