Emerging ultrasound (US) biomedical applications, from battery-powered US imaging to US neuromodulation, demand wearable form factor and power-efficient US transmitters. Fulfilling these specifications demands a high-frequency and power-efficient 2D US phased-array transmitter directly integrated with the ASIC. In such systems, pulsers are the most power-hungry block owing to delivering high-voltage pulses to the US transducers. This paper presents a power-efficient high-voltage pulser to drive a 2D phased-array of piezoelectric transducers. The proposed pulser employs two storage capacitors per channel to save the charge of the US transducer and reuse it in the next phase. Moreover, utilizing a stack of two low-voltage CMOS transistors enables delivering 15-MHz pulses with an amplitude of 10 V to the piezoelectric transducers. The proposed pulser is designed and simulated in 180 nm CMOS technology. The simulation results demonstrate that the proposed pulser reduces the power consumption by 40.9% compared to the conventional class D pulser.