L. Zhang
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3 records found
1
Digital beamforming receivers (RXs) support MIMO operation and offer great flexibility and accuracy in multi-beam formation and calibration. However, compared with analog phased-array and hybrid systems, due to the absence of any rejection for spatial in-band blockers, the RX/ADC dynamic range and linearity should be high enough to prevent array saturation. Therefore, the use of self-steering spatial notch filters (SNFs) is necessary to aid the digital beamformers and reduce RX/ADC power consumption while strong blockers exist. To address that, the sub-6GHz RXs in [1], [2] synthesize a baseband spatial notch impedance and translate it to RF by passive mixers. However, this technique cannot be directly applied at mm-wave frequencies as the impedance translational performance of the passive mixers degrades significantly. Hence, the mm-wave beamformer in [3] realizes a cascadable SNF at an intermediate frequency (IF). However, the front-end mm-wave components like mixers and phase shifters have to tolerate strong blockers, thus degrading RX linearity. Besides, it uses multiple IF buffers and VGAs for signal scaling and combining, which could be power-hungry if a similar method is adopted to realize a mm-wave SNF. To improve on those limitations, we propose a scalable SNF structure, which (1) suppresses the strongest in-band blocker at mm-wave frequencies, (2) supports N-input-N-output MIMOs, and (3) requires no active blocks except the phase shifters. A two-step autonomous notch-steering technique is also developed to adjust the SNF notch direction power-efficiently and accurately.
This letter presents a convenient approach based on the two-port kQ-product theory to analyze the influence of interwinding capacitive coupling on the efficiency of the transformer. It is demonstrated that a transformer with proper size can benefit from the interwinding capacitive coupling to maximize its efficiency at a desired frequency. The proposed design approach is used in a W-band low-noise amplifier (LNA) fabricated with the 40-nm CMOS process to optimize the insertion loss of the input transformer-based balun. Thanks to the approach, the W-band LNA achieves a minimum noise figure of 5.7 dB, a maximum gain of 18.5 dB, and a 3-dB bandwidth of 76.5-92.6 GHz, while consuming 23.4 mW from a 0.9-V supply.
This letter presents a millimeter-wave (mm-wave) vector-modulated phase shifter (VMPS) for phased-array applications. To improve the phase-shift accuracy without drastically increasing design complexity, the proposed VMPS structure employs variable-gain amplifiers (VGAs) that offer 2× better resolution at their low-gain states compared to their high-gain states. A two-stage current-reused structure is also proposed to implement the desired VGAs with minimal layout complexity, negligible gain penalty, and no extra power. Moreover, the proposed VMPS can maintain its phase-shift accuracy even at lower voltage gains. Fabricated in 40-nm CMOS, the prototype core consumes 11 mW from a 1.1-V supply and occupies a core area of 0.19 mm2. At 28 GHz, with a phase resolution of 0.61°, the measured RMS phase error is 0.23° at the maximum gain and remains <0.5∘ at 9-dB gain back-off. With a fixed set of VGA’s codewords, the RMS phase error and gain variation error are, respectively, lower than 1° and 0.24-dB over a bandwidth of 23.8–30.4 GHz. ...
This letter presents a millimeter-wave (mm-wave) vector-modulated phase shifter (VMPS) for phased-array applications. To improve the phase-shift accuracy without drastically increasing design complexity, the proposed VMPS structure employs variable-gain amplifiers (VGAs) that offer 2× better resolution at their low-gain states compared to their high-gain states. A two-stage current-reused structure is also proposed to implement the desired VGAs with minimal layout complexity, negligible gain penalty, and no extra power. Moreover, the proposed VMPS can maintain its phase-shift accuracy even at lower voltage gains. Fabricated in 40-nm CMOS, the prototype core consumes 11 mW from a 1.1-V supply and occupies a core area of 0.19 mm2. At 28 GHz, with a phase resolution of 0.61°, the measured RMS phase error is 0.23° at the maximum gain and remains <0.5∘ at 9-dB gain back-off. With a fixed set of VGA’s codewords, the RMS phase error and gain variation error are, respectively, lower than 1° and 0.24-dB over a bandwidth of 23.8–30.4 GHz.